xref: /XiangShan/build.sbt (revision 5e414fe2a1de082137d59bf53033b3792ed98e79)
1*5e414fe2SJiawei Linval chiselVersion = "3.4.3"
2*5e414fe2SJiawei LinscalaVersion := "2.12.10"
3*5e414fe2SJiawei Lin
4*5e414fe2SJiawei Linlazy val commonSettings = Seq(
5*5e414fe2SJiawei Lin  scalacOptions ++= Seq("-deprecation","-unchecked","-Xsource:2.11"),
6*5e414fe2SJiawei Lin  libraryDependencies ++= Seq("org.scala-lang" % "scala-reflect" % scalaVersion.value),
7*5e414fe2SJiawei Lin  libraryDependencies ++= Seq("org.json4s" %% "json4s-jackson" % "3.6.1"),
8*5e414fe2SJiawei Lin  libraryDependencies ++= Seq("org.scalatest" %% "scalatest" % "3.2.0" % "test"),
9*5e414fe2SJiawei Lin  addCompilerPlugin("org.scalamacros" % "paradise" % "2.1.0" cross CrossVersion.full),
10*5e414fe2SJiawei Lin  resolvers ++= Seq(
11*5e414fe2SJiawei Lin    Resolver.sonatypeRepo("snapshots"),
12*5e414fe2SJiawei Lin    Resolver.sonatypeRepo("releases"),
13*5e414fe2SJiawei Lin    Resolver.mavenLocal
14*5e414fe2SJiawei Lin  )
15*5e414fe2SJiawei Lin)
16*5e414fe2SJiawei Lin
17*5e414fe2SJiawei Linlazy val chiselSettings = Seq(
18*5e414fe2SJiawei Lin  libraryDependencies ++= Seq("edu.berkeley.cs" %% "chisel3" % chiselVersion),
19*5e414fe2SJiawei Lin  addCompilerPlugin("edu.berkeley.cs" % "chisel3-plugin" % chiselVersion cross CrossVersion.full)
20*5e414fe2SJiawei Lin)
21*5e414fe2SJiawei Lin
22*5e414fe2SJiawei Linlazy val `api-config-chipsalliance` = (project in file("api-config-chipsalliance/build-rules/sbt"))
23*5e414fe2SJiawei Lin  .settings(commonSettings)
24*5e414fe2SJiawei Lin
25*5e414fe2SJiawei Linlazy val hardfloat = (project in file("berkeley-hardfloat"))
26*5e414fe2SJiawei Lin  .settings(commonSettings, chiselSettings)
27*5e414fe2SJiawei Lin
28*5e414fe2SJiawei Linlazy val rocketMacros = (project in file("rocket-chip/macros"))
29*5e414fe2SJiawei Lin  .settings(commonSettings)
30*5e414fe2SJiawei Lin
31*5e414fe2SJiawei Linlazy val `rocket-chip` = (Project("rocket-chip", file("rocket-chip/src")))
32*5e414fe2SJiawei Lin  .settings(commonSettings, chiselSettings)
33*5e414fe2SJiawei Lin  .settings(
34*5e414fe2SJiawei Lin    scalaSource in Compile := baseDirectory.value / "main" / "scala",
35*5e414fe2SJiawei Lin    resourceDirectory in Compile := baseDirectory.value / "main" / "resources"
36*5e414fe2SJiawei Lin  )
37*5e414fe2SJiawei Lin  .dependsOn(rocketMacros)
38*5e414fe2SJiawei Lin  .dependsOn(`api-config-chipsalliance`)
39*5e414fe2SJiawei Lin  .dependsOn(hardfloat)
40*5e414fe2SJiawei Lin
41*5e414fe2SJiawei Linlazy val `block-inclusive-cache` = (project in file("block-inclusivecache-sifive"))
42*5e414fe2SJiawei Lin  .settings(commonSettings, chiselSettings)
43*5e414fe2SJiawei Lin  .settings(
44*5e414fe2SJiawei Lin    scalaSource in Compile := baseDirectory.value / "design" / "craft" / "inclusivecache",
45*5e414fe2SJiawei Lin  )
46*5e414fe2SJiawei Lin  .dependsOn(`rocket-chip`)
47*5e414fe2SJiawei Lin
48*5e414fe2SJiawei Linlazy val chiseltest = (project in file("chiseltest"))
49*5e414fe2SJiawei Lin  .settings(commonSettings, chiselSettings)
50*5e414fe2SJiawei Lin
51*5e414fe2SJiawei Linlazy val xiangshan = (Project("XiangShan", base = file(".")))
52*5e414fe2SJiawei Lin  .settings(commonSettings, chiselSettings)
53*5e414fe2SJiawei Lin  .dependsOn(`rocket-chip`, `block-inclusive-cache`, chiseltest)