1# NOOP 2 3NOOP(NJU Out-of-Order Processor) is a processor targeting super-scalar out-of-order execution. 4Currently it only supports riscv32. 5 6## Compile chisel code 7 8* Install `mill`. Refer to [the Manual section in this guide][mill]. 9* Run `make init` to init git submodules 10* Run `make` to generate verilog code. The output file is `build/TopMain.v`. 11 12[mill]: http://lihaoyi.com/mill#manual 13 14## Run programs by simulation 15 16* Set a new environment variable `NEMU_HOME` to the **absolute path** of the NEMU project. 17* Set a new environment variable `NOOP_HOME` to the **absolute path** of the NOOP project. 18* Clone the [AM project](https://github.com/NJU-ProjectN/nexus-am.git). 19* Set a new environment variable `AM_HOME` to the **absolute path** of the AM project. 20* Add a new AM `riscv64-noop` in the AM project if it is not provided. 21* Run the application in the AM project by `make ARCH=riscv64-noop run`. 22 23## Run on FPGA 24 25### Sub-directories Overview 26``` 27fpga 28├── board # supported FPGA boards and files to build a Vivado project 29├── boot # PS boot flow of zynq and zynqmp 30├── lib # HDL sources shared by different boards 31├── Makefile 32├── Makefile.check 33└── noop.tcl # wrapper of NOOP core in the Vivado project 34``` 35 36### Build a Vivado project 37 38* Install Vivado 2019.1, and source the setting of Vivado and SDK 39* Run the following command to build a Vivado project 40``` 41cd fpga 42make PRJ=myproject BOARD=axu3cg 43``` 44Change `axu3cg` to the target board you want. Supported boards are listed under `board/`. 45The project will be created under `board/axu3cg/build/myproject-axu3cg`. 46* Open the project with Vivado and generate bitstream. 47 48### Prepare SD card 49 50Refer to the instructions of [fpga/boot/README.md](fpga/boot/README.md). 51 52NOTE: Remember to put the bitstream into BOOT.BIN, since the guide is going to boot everything from SD card. 53 54### Set your board to SD boot mode 55 56Please refer to the user guide of your board. 57* [zedboard](http://www.zedboard.org/sites/default/files/ZedBoard_HW_UG_v1_1.pdf) 58* [zcu102](https://www.xilinx.com/support/documentation/boards_and_kits/zcu102/ug1182-zcu102-eval-bd.pdf) 59* [sidewinder](http://sidewinder.fidus.com) 60* ultraZ (currently not avaliable to the public) 61* axu3cg (currently not avaliable to the public) 62 63### Boot linux in PS 64 65Just insert the SD card into the board, open a serial terminal and powerup the board. 66 67### Boot NOOP (the RISC-V subsystem) 68 69To boot the RISC-V subsystem 70* Send `fpga/resource/ddr-loader/ddr-loader.c` to PS. 71This can be achieved by either copying the file to SD card, 72or by sending the file with `scp` if you have your board connected to your host by network. 73* Compile the loader by gcc on PS. 74``` 75gcc -O2 -o ddr-loader ddr-loader.c 76``` 77* Send the RISC-V program (bin file, should start at 0x80000000) to PS. 78* Open minicom on PS to connect to the UART of NOOP. 79Note that you can connect to PS via `ssh` and use `tmux` to get multiple terminals. 80``` 81minicom -D /dev/ttyUL1 82``` 83* Use the loader to load the program to NOOP memory and start running NOOP. 84``` 85./ddr-loader axu3cg bin-file 86``` 87* To shutdown the board, first run `poweroff` in PS. 88