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/linux-6.14.4/Documentation/devicetree/bindings/display/rockchip/
Drockchip,rk3588-dw-hdmi-qp.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/display/rockchip/rockchip,rk3588-dw-hdmi-qp.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Cristian Ciocaltea <[email protected]>
23 * Multi-stream audio
27 - $ref: /schemas/sound/dai-common.yaml#
32 - rockchip,rk3588-dw-hdmi-qp
39 - description: Peripheral/APB bus clock
40 - description: EARC RX biphase clock
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Drockchip-vop2.yaml1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
3 ---
4 $id: http://devicetree.org/schemas/display/rockchip/rockchip-vop2.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
15 - Sandy Huang <hjc@rock-chips.com>
16 - Heiko Stuebner <[email protected]>
21 - rockchip,rk3566-vop
22 - rockchip,rk3568-vop
23 - rockchip,rk3588-vop
27 - description:
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/linux-6.14.4/Documentation/devicetree/bindings/soc/rockchip/
Dgrf.yaml1 # SPDX-License-Identifier: GPL-2.0
3 ---
4 $id: http://devicetree.org/schemas/soc/rockchip/grf.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Rockchip General Register Files (GRF)
10 - Heiko Stuebner <[email protected]>
15 - items:
16 - enum:
17 - rockchip,rk3288-sgrf
18 - rockchip,rk3566-pipe-grf
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/linux-6.14.4/Documentation/devicetree/bindings/phy/
Dphy-rockchip-usbdp.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/phy/phy-rockchip-usbdp.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Frank Wang <frank.wang@rock-chips.com>
11 - Zhang Yubing <yubing.zhang@rock-chips.com>
16 - rockchip,rk3576-usbdp-phy
17 - rockchip,rk3588-usbdp-phy
22 "#phy-cells":
25 - PHY_TYPE_USB3
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/linux-6.14.4/drivers/gpu/drm/rockchip/
Ddw_hdmi_qp-rockchip.c1 // SPDX-License-Identifier: GPL-2.0-or-later
3 * Copyright (c) 2021-2022 Rockchip Electronics Co., Ltd.
6 * Author: Algea Cao <algea.cao@rock-chips.com>
74 struct drm_crtc *crtc = encoder->crtc; in dw_hdmi_qp_rockchip_encoder_enable()
78 gpiod_set_value(hdmi->enable_gpio, 1); in dw_hdmi_qp_rockchip_encoder_enable()
80 if (crtc && crtc->state) { in dw_hdmi_qp_rockchip_encoder_enable()
81 rate = drm_hdmi_compute_mode_clock(&crtc->state->adjusted_mode, in dw_hdmi_qp_rockchip_encoder_enable()
88 * drivers/phy/rockchip/phy-rockchip-samsung-hdptx.c in dw_hdmi_qp_rockchip_encoder_enable()
90 phy_set_bus_width(hdmi->phy, div_u64(rate, 100)); in dw_hdmi_qp_rockchip_encoder_enable()
101 s->output_mode = ROCKCHIP_OUT_MODE_AAAA; in dw_hdmi_qp_rockchip_encoder_atomic_check()
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/linux-6.14.4/arch/arm64/boot/dts/rockchip/
Drk3588-extra.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
6 #include "rk3588-base.dtsi"
7 #include "rk3588-extra-pinctrl.dtsi"
11 compatible = "rockchip,rk3588-dwc3", "snps,dwc3";
16 clock-names = "ref_clk", "suspend_clk", "bus_clk";
19 phy-names = "usb2-phy", "usb3-phy";
21 power-domains = <&power RK3588_PD_USB>;
24 snps,dis-u2-freeclk-exists-quirk;
25 snps,dis-del-phy-power-chg-quirk;
26 snps,dis-tx-ipgap-linecheck-quirk;
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Drk3576.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
6 #include <dt-bindings/clock/rockchip,rk3576-cru.h>
7 #include <dt-bindings/interrupt-controller/arm-gic.h>
8 #include <dt-bindings/interrupt-controller/irq.h>
9 #include <dt-bindings/phy/phy.h>
10 #include <dt-bindings/pinctrl/rockchip.h>
11 #include <dt-bindings/power/rockchip,rk3576-power.h>
12 #include <dt-bindings/reset/rockchip,rk3576-cru.h>
13 #include <dt-bindings/soc/rockchip,boot-mode.h>
18 interrupt-parent = <&gic>;
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Drk3588-base.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
6 #include <dt-bindings/clock/rockchip,rk3588-cru.h>
7 #include <dt-bindings/interrupt-controller/arm-gic.h>
8 #include <dt-bindings/interrupt-controller/irq.h>
9 #include <dt-bindings/power/rk3588-power.h>
10 #include <dt-bindings/reset/rockchip,rk3588-cru.h>
11 #include <dt-bindings/phy/phy.h>
12 #include <dt-bindings/ata/ahci.h>
13 #include <dt-bindings/thermal/thermal.h>
18 interrupt-parent = <&gic>;
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/linux-6.14.4/drivers/phy/rockchip/
Dphy-rockchip-usbdp.c1 // SPDX-License-Identifier: GPL-2.0-or-later
5 * Copyright (C) 2021-2024 Rockchip Electronics Co., Ltd
9 #include <dt-bindings/phy/phy.h>
32 /* VO0 GRF Registers */
115 /* u2phy-grf */
119 /* usb-grf */
123 /* usbdpphy-grf */
129 /* vo-grf */
179 bool hs; /* flag for high-speed */
204 /* voltage swing 0, pre-emphasis 0->3 */
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