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/linux-6.14.4/drivers/hwtracing/intel_th/
Dsth.c1 // SPDX-License-Identifier: GPL-2.0
5 * Copyright (C) 2014-2015 Intel Corporation.
16 #include <linux/stm.h>
22 void __iomem *base; member
26 struct stm_data stm; member
33 struct intel_th_channel __iomem *sw_map = sth->channels; in sth_channel()
35 return &sw_map[(master - sth->stm.sw_start) * sth->stm.sw_nchannels + in sth_channel()
70 struct sth_device *sth = container_of(stm_data, struct sth_device, stm); in sth_stm_packet()
96 writeb_relaxed(*payload, sth->base + reg); in sth_stm_packet()
103 sth_iowrite(&out->MERR, payload, size); in sth_stm_packet()
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/linux-6.14.4/drivers/hwtracing/coresight/
Dcoresight-stm.c1 // SPDX-License-Identifier: GPL-2.0
3 * Copyright (c) 2015-2016, The Linux Foundation. All rights reserved.
8 * (C) 2014-2015 Pratik Patel <[email protected]>
12 * (C) 2015-2016 Mathieu Poirier <[email protected]>
15 * generic STM API by Chunyan Zhang
16 * (C) 2015-2016 Chunyan Zhang <[email protected]>
24 #include <linux/coresight-stm.h>
31 #include <linux/stm.h>
34 #include "coresight-priv.h"
35 #include "coresight-trace-id.h"
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/linux-6.14.4/Documentation/devicetree/bindings/arm/
Darm,coresight-stm.yaml1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
3 ---
4 $id: http://devicetree.org/schemas/arm/arm,coresight-stm.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Mathieu Poirier <[email protected]>
11 - Mike Leach <[email protected]>
12 - Leo Yan <[email protected]>
13 - Suzuki K Poulose <[email protected]>
23 The STM is a trace source that is integrated into a CoreSight system, designed
24 primarily for high-bandwidth trace of instrumentation embedded into software.
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/linux-6.14.4/arch/arm64/boot/dts/sprd/
Dsc9836.dtsi1 // SPDX-License-Identifier: (GPL-2.0-only OR MIT)
9 #include <dt-bindings/interrupt-controller/arm-gic.h>
15 #address-cells = <2>;
16 #size-cells = <0>;
20 compatible = "arm,cortex-a53";
22 enable-method = "psci";
27 compatible = "arm,cortex-a53";
29 enable-method = "psci";
34 compatible = "arm,cortex-a53";
36 enable-method = "psci";
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Dsc9860.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
8 #include <dt-bindings/interrupt-controller/arm-gic.h>
9 #include <dt-bindings/input/input.h>
10 #include <dt-bindings/gpio/gpio.h>
15 #address-cells = <2>;
16 #size-cells = <0>;
18 cpu-map {
52 compatible = "arm,cortex-a53";
54 enable-method = "psci";
55 cpu-idle-states = <&CORE_PD &CLUSTER_PD>;
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/linux-6.14.4/Documentation/trace/coresight/
Dcoresight.rst2 Coresight - HW Assisted Tracing on ARM
9 ------------
38 0 CPU 0<-->: C : 0 CPU 0<-->: C : : C : @ STM @ || System ||
39 |->0000000 : T : |->0000000 : T : : T :<--->@@@@@ || Memory ||
40 | #######<-->: I : | #######<-->: I : : I : @@@<-| ||||||||||||
43 | |->### | ! | |->### | ! | ! . | || DAP ||
49 *****************************************************************<-|
63 | * ===== F =====<---------|
65 |-->:: CTI ::<!! === N ===
69 |------>&& ETB &&<......II I =======
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/linux-6.14.4/drivers/staging/gpib/tnt4882/
Dmite.h1 /* SPDX-License-Identifier: GPL-2.0-only */
6 * Copyright (C) 1999 David A. Schleef <ds@stm.lbl.gov>
50 return mite->pcidev->irq; in mite_irq()
55 return mite->pcidev->device; in mite_device_id()
66 /* DMA base for chan 0 is 0x500, chan 1 is 0x600 */
222 MITE_IODWBSR = 0xc0, //IO Device Window Base Size Register
224 MITE_IODWBSR_1 = 0xc4, // IO Device Window Base Size Register 1 (used by 6602 boards)
/linux-6.14.4/arch/arm64/boot/dts/arm/
Djuno-base.dtsi1 // SPDX-License-Identifier: GPL-2.0
2 #include "juno-clocks.dtsi"
3 #include "juno-motherboard.dtsi"
11 compatible = "arm,armv7-timer-mem";
13 clock-frequency = <50000000>;
14 #address-cells = <1>;
15 #size-cells = <1>;
19 frame-number = <1>;
31 #mbox-cells = <1>;
33 clock-names = "apb_pclk";
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/linux-6.14.4/drivers/spi/
Dspi-st-ssc4.c1 // SPDX-License-Identifier: GPL-2.0-only
3 * Copyright (c) 2008-2014 STMicroelectronics Limited
55 void __iomem *base; member
74 if (spi_st->words_remaining > FIFO_SIZE) in ssc_write_tx_fifo()
77 count = spi_st->words_remaining; in ssc_write_tx_fifo()
80 if (spi_st->tx_ptr) { in ssc_write_tx_fifo()
81 if (spi_st->bytes_per_word == 1) { in ssc_write_tx_fifo()
82 word = *spi_st->tx_ptr++; in ssc_write_tx_fifo()
84 word = *spi_st->tx_ptr++; in ssc_write_tx_fifo()
85 word = *spi_st->tx_ptr++ | (word << 8); in ssc_write_tx_fifo()
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/linux-6.14.4/arch/arm/mm/
Dalignment.c1 // SPDX-License-Identifier: GPL-2.0-only
6 * Modifications for ARM processor (c) 1995-2001 Russell King
8 * - Adapted from gdb/sim/arm/thumbemu.c -- Thumb instruction emulation.
32 * 32-bit misaligned trap handler (c) 1998 San Mehat (CCC) -July 1998
52 #define LDSTHD_I_BIT(i) (i & (1 << 22)) /* double/half-word immed */
72 /* Thumb-2 32 bit format per ARMv7 DDI0406A A6.3, either f800h,e800h,f800h */
104 * LDM, STM, LDRD and STRD still need to be handled. in safe_usermode()
107 * CPUs since we spin re-faulting the instruction without in safe_usermode()
158 return -EFAULT; in alignment_proc_write()
160 ai_usermode = safe_usermode(mode - '0', true); in alignment_proc_write()
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/linux-6.14.4/arch/arm/kernel/
Dentry-header.S1 /* SPDX-License-Identifier: GPL-2.0 */
6 #include <asm/asm-offsets.h>
9 #include <asm/uaccess-asm.h>
13 @ -----------------
59 * ARMv7-M exception entry/exit macros.
86 @ we cannot rely on r0-r3 and r12 matching the value saved in the
87 @ exception frame because of tail-chaining. So these have to be
89 ldmia r12!, {r0-r3}
94 sub sp, #PT_REGS_SIZE-S_IP
95 stmdb sp!, {r0-r11}
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/linux-6.14.4/drivers/
DMakefile1 # SPDX-License-Identifier: GPL-2.0
6 # Rewritten to use lists instead of if-statements.
9 obj-y += cache/
10 obj-y += irqchip/
11 obj-y += bus/
13 obj-$(CONFIG_GENERIC_PHY) += phy/
16 obj-$(CONFIG_PINCTRL) += pinctrl/
17 obj-$(CONFIG_GPIOLIB) += gpio/
18 obj-y += pwm/
21 obj-y += leds/
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/linux-6.14.4/drivers/soc/tegra/cbb/
Dtegra234-cbb.c1 // SPDX-License-Identifier: GPL-2.0
3 * Copyright (c) 2021-2022, NVIDIA CORPORATION. All rights reserved
25 #include <soc/tegra/tegra-cbb.h>
108 struct tegra_cbb base; member
130 return container_of(cbb, struct tegra234_cbb, base); in to_tegra234_cbb()
141 if (!cbb->fabric->firewall_base || in tegra234_cbb_write_access_allowed()
142 !cbb->fabric->firewall_ctl || in tegra234_cbb_write_access_allowed()
143 !cbb->fabric->firewall_wr_ctl) { in tegra234_cbb_write_access_allowed()
144 dev_info(&pdev->dev, "SoC data missing for firewall\n"); in tegra234_cbb_write_access_allowed()
148 if ((cbb->fabric->firewall_ctl > FIREWALL_APERTURE_SZ) || in tegra234_cbb_write_access_allowed()
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/linux-6.14.4/crypto/
Dansi_cprng.c1 // SPDX-License-Identifier: GPL-2.0-or-later
34 * See http://csrc.nist.gov/groups/STM/cavp/documents/rng/931rngext.pdf
91 hexdump("Input DT: ", ctx->DT, DEFAULT_BLK_SZ); in _get_more_prng_bytes()
92 hexdump("Input I: ", ctx->I, DEFAULT_BLK_SZ); in _get_more_prng_bytes()
93 hexdump("Input V: ", ctx->V, DEFAULT_BLK_SZ); in _get_more_prng_bytes()
106 memcpy(tmp, ctx->DT, DEFAULT_BLK_SZ); in _get_more_prng_bytes()
107 output = ctx->I; in _get_more_prng_bytes()
117 xor_vectors(ctx->I, ctx->V, tmp, DEFAULT_BLK_SZ); in _get_more_prng_bytes()
119 output = ctx->rand_data; in _get_more_prng_bytes()
126 if (!memcmp(ctx->rand_data, ctx->last_rand_data, in _get_more_prng_bytes()
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/linux-6.14.4/drivers/gpu/drm/
DKconfig1 # SPDX-License-Identifier: GPL-2.0-only
16 # gallium uses SYS_kcmp for os_same_file_description() to de-duplicate
21 Kernel-level support for the Direct Rendering Infrastructure (DRI)
62 Use dynamic-debug to avoid drm_debug_enabled() runtime overheads.
95 Documentation/dev-tools/kunit/.
111 bool "Display a user-friendly message when a kernel panic occurs"
116 Enable a drm panic handler, which will display a user-friendly message
117 when a kernel panic occurs. It's useful when using a user-space
120 To support Hi-DPI Display, you can enable bigger fonts like
167 string "Base URL of the QR code in the panic screen"
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/linux-6.14.4/arch/arm64/boot/dts/qcom/
Dmsm8916.dtsi1 // SPDX-License-Identifier: GPL-2.0-only
3 * Copyright (c) 2013-2015, The Linux Foundation. All rights reserved.
6 #include <dt-bindings/arm/coresight-cti-dt.h>
7 #include <dt-bindings/clock/qcom,gcc-msm8916.h>
8 #include <dt-bindings/clock/qcom,rpmcc.h>
9 #include <dt-bindings/interconnect/qcom,msm8916.h>
10 #include <dt-bindings/interrupt-controller/arm-gic.h>
11 #include <dt-bindings/power/qcom-rpmpd.h>
12 #include <dt-bindings/reset/qcom,gcc-msm8916.h>
13 #include <dt-bindings/soc/qcom,apr.h>
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Dmsm8998.dtsi1 // SPDX-License-Identifier: GPL-2.0
4 #include <dt-bindings/interrupt-controller/arm-gic.h>
5 #include <dt-bindings/clock/qcom,gcc-msm8998.h>
6 #include <dt-bindings/clock/qcom,gpucc-msm8998.h>
7 #include <dt-bindings/clock/qcom,mmcc-msm8998.h>
8 #include <dt-bindings/clock/qcom,rpmcc.h>
9 #include <dt-bindings/firmware/qcom,scm.h>
10 #include <dt-bindings/power/qcom-rpmpd.h>
11 #include <dt-bindings/gpio/gpio.h>
14 interrupt-parent = <&intc>;
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Dqcs8300.dtsi1 // SPDX-License-Identifier: BSD-3-Clause
6 #include <dt-bindings/clock/qcom,qcs8300-gcc.h>
7 #include <dt-bindings/clock/qcom,rpmh.h>
8 #include <dt-bindings/clock/qcom,sa8775p-camcc.h>
9 #include <dt-bindings/clock/qcom,sa8775p-dispcc.h>
10 #include <dt-bindings/clock/qcom,sa8775p-gpucc.h>
11 #include <dt-bindings/clock/qcom,sa8775p-videocc.h>
12 #include <dt-bindings/firmware/qcom,scm.h>
13 #include <dt-bindings/interconnect/qcom,icc.h>
14 #include <dt-bindings/interconnect/qcom,qcs8300-rpmh.h>
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Dqcs615.dtsi1 // SPDX-License-Identifier: BSD-3-Clause
6 #include <dt-bindings/clock/qcom,qcs615-gcc.h>
7 #include <dt-bindings/clock/qcom,rpmh.h>
8 #include <dt-bindings/dma/qcom-gpi.h>
9 #include <dt-bindings/interconnect/qcom,icc.h>
10 #include <dt-bindings/interconnect/qcom,qcs615-rpmh.h>
11 #include <dt-bindings/interrupt-controller/arm-gic.h>
12 #include <dt-bindings/power/qcom-rpmpd.h>
13 #include <dt-bindings/power/qcom,rpmhpd.h>
14 #include <dt-bindings/soc/qcom,rpmh-rsc.h>
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Dsm6115.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause)
6 #include <dt-bindings/clock/qcom,gcc-sm6115.h>
7 #include <dt-bindings/clock/qcom,sm6115-dispcc.h>
8 #include <dt-bindings/clock/qcom,sm6115-gpucc.h>
9 #include <dt-bindings/clock/qcom,rpmcc.h>
10 #include <dt-bindings/dma/qcom-gpi.h>
11 #include <dt-bindings/firmware/qcom,scm.h>
12 #include <dt-bindings/gpio/gpio.h>
13 #include <dt-bindings/interconnect/qcom,rpm-icc.h>
14 #include <dt-bindings/interconnect/qcom,sm6115.h>
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/linux-6.14.4/include/linux/
Dlibata.h1 /* SPDX-License-Identifier: GPL-2.0-or-later */
3 * Copyright 2003-2005 Red Hat, Inc. All rights reserved.
4 * Copyright 2003-2005 Jeff Garzik
7 * as Documentation/driver-api/libata.rst
16 #include <linux/dma-mapping.h>
28 * Define if arch has non-standard setup. This is a _PCI_ standard
32 #include <asm/libata-portmap.h>
39 * compile-time options: to be removed as soon as all the drivers are
60 * ata_device->quirks is an unsigned int, so __ATA_QUIRK_MAX must not exceed 32.
110 ATA_ALL_DEVICES = (1 << ATA_MAX_DEVICES) - 1,
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/linux-6.14.4/arch/arm/
DKconfig1 # SPDX-License-Identifier: GPL-2.0
162 The ARM series is a line of low-power-consumption RISC chip designs
164 handhelds such as the Compaq IPAQ. ARM-based PCs are no longer
165 manufactured, but legacy ARM-based PC hardware remains popular in
176 supported in LLD until version 14. The combined range is -/+ 256 MiB,
269 Patch phys-to-virt and virt-to-phys translation functions at
273 This can only be used with non-XIP MMU kernels where the base
319 bool "MMU-based Paged Memory Management Support"
322 Select if you want MMU-based virtualised addressing space
357 # This is sorted alphabetically by mach-* pathname. However, plat-*
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/linux-6.14.4/drivers/accel/habanalabs/gaudi2/
Dgaudi2_coresight.c1 // SPDX-License-Identifier: GPL-2.0
4 * Copyright 2019-2022 HabanaLabs, Ltd.
13 #define COMPONENT_ID_INVALID ((u32)(-1))
45 * struct component_config_offsets - per cs_dbg unit - view off all related components indices
46 * @funnel_id: funnel id - index in debug_funnel_regs
47 * @etf_id: etf id - index in debug_etf_regs
48 * @stm_id: stm id - index in debug_stm_regs
49 * @spmu_id: spmu_id - index in debug_spmu_regs
51 * @bmon_ids: array of bmon id (max size - MAX_BMONS_PER_UNIT) index in debug_bmon_regs
1933 if (hdev->pldm) in gaudi2_coresight_timeout()
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/linux-6.14.4/drivers/i2c/busses/
Di2c-rcar.c1 // SPDX-License-Identifier: GPL-2.0
3 * Driver for the Renesas R-Car I2C unit
5 * Copyright (C) 2014-19 Wolfram Sang <wsa@sang-engineering.com>
6 * Copyright (C) 2011-2019 Renesas Electronics Corporation
8 * Copyright (C) 2012-14 Renesas Solutions Corp.
11 * This file is based on the drivers/i2c/busses/i2c-sh7760.c
12 * (c) 2005-2008 MSC Vertriebsges.m.b.H, Manuel Lauss <mlau@msc-ge.com>
18 #include <linux/dma-mapping.h>
24 #include <linux/i2c-smbus.h>
58 #define MDBS BIT(7) /* non-fifo mode switch */
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/linux-6.14.4/drivers/net/ethernet/marvell/
Dsky2.h1 /* SPDX-License-Identifier: GPL-2.0 */
30 /* Yukon-2 */
32 PCI_Y2_PIG_ENA = 1<<31, /* Enable Plug-in-Go (YUKON-2) */
33 PCI_Y2_DLL_DIS = 1<<30, /* Disable PCI DLL (YUKON-2) */
34 PCI_SW_PWR_ON_RST= 1<<30, /* SW Power on Reset (Yukon-EX) */
35 PCI_Y2_PHY2_COMA = 1<<29, /* Set PHY 2 to Coma Mode (YUKON-2) */
36 PCI_Y2_PHY1_COMA = 1<<28, /* Set PHY 1 to Coma Mode (YUKON-2) */
37 PCI_Y2_PHY2_POWD = 1<<27, /* Set PHY 2 to Power Down (YUKON-2) */
38 PCI_Y2_PHY1_POWD = 1<<26, /* Set PHY 1 to Power Down (YUKON-2) */
60 /* PCI_OUR_REG_3 32 bit Our Register 3 (Yukon-ECU only) */
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