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/linux-6.14.4/drivers/base/regmap/
Dregmap-spi.c1 // SPDX-License-Identifier: GPL-2.0
3 // Register map access API - SPI support
10 #include <linux/spi/spi.h>
25 regmap_async_complete_cb(&async->core, async->m.status); in regmap_spi_complete()
31 struct spi_device *spi = to_spi_device(dev); in regmap_spi_write() local
33 return spi_write(spi, data, count); in regmap_spi_write()
41 struct spi_device *spi = to_spi_device(dev); in regmap_spi_gather_write() local
50 return spi_sync(spi, &m); in regmap_spi_gather_write()
62 struct spi_device *spi = to_spi_device(dev); in regmap_spi_async_write() local
64 async->t[0].tx_buf = reg; in regmap_spi_async_write()
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/linux-6.14.4/Documentation/devicetree/bindings/spi/
Dspi-peripheral-props.yaml1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/spi/spi-peripheral-props.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Peripheral-specific properties for a SPI bus.
10 Many SPI controllers need to add properties to peripheral devices. They could
11 be common properties like spi-max-frequency, spi-cpha, etc. or they could be
13 need to be defined in the peripheral node because they are per-peripheral and
19 - Mark Brown <[email protected]>
27 - minimum: 0
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Dmediatek,spi-mtk-snfi.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/spi/mediatek,spi-mtk-snfi.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: SPI-NAND flash controller for MediaTek ARM SoCs
10 - Chuanhong Guo <[email protected]>
13 The Mediatek SPI-NAND flash controller is an extended version of
14 the Mediatek NAND flash controller. It can perform standard SPI
15 instructions with one continuous write and one read for up-to 0xa0
16 bytes. It also supports typical SPI-NAND page cache operations
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Dspi-lantiq-ssc.txt1 Lantiq Synchronous Serial Controller (SSC) SPI master driver
4 - compatible: "lantiq,ase-spi", "lantiq,falcon-spi", "lantiq,xrx100-spi",
5 "intel,lgm-spi"
6 - #address-cells: see spi-bus.txt
7 - #size-cells: see spi-bus.txt
8 - reg: address and length of the spi master registers
9 - interrupts:
10 For compatible "intel,lgm-ssc" - the common interrupt number for
18 - clocks: spi clock phandle
19 - num-cs: see spi-bus.txt, set to 8 if unset
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Daspeed,ast2600-fmc.yaml1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/spi/aspeed,ast2600-fmc.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Chin-Ting Kuo <chin-[email protected]>
11 - Cédric Le Goater <[email protected]>
15 SPI) of the AST2400, AST2500 and AST2600 SOCs.
18 - $ref: spi-controller.yaml#
23 - aspeed,ast2600-fmc
24 - aspeed,ast2600-spi
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Dnvidia,tegra210-quad.yaml1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/spi/nvidia,tegra210-quad.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Tegra Quad SPI Controller
10 - Thierry Reding <[email protected]>
11 - Jonathan Hunter <[email protected]>
14 - $ref: spi-controller.yaml#
19 - nvidia,tegra210-qspi
20 - nvidia,tegra186-qspi
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Dallwinner,sun6i-a31-spi.yaml1 # SPDX-License-Identifier: GPL-2.0
3 ---
4 $id: http://devicetree.org/schemas/spi/allwinner,sun6i-a31-spi.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Allwinner A31 SPI Controller
10 - $ref: spi-controller.yaml
13 - Chen-Yu Tsai <[email protected]>
14 - Maxime Ripard <[email protected]>
19 - const: allwinner,sun50i-r329-spi
20 - const: allwinner,sun6i-a31-spi
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/linux-6.14.4/Documentation/spi/
Dspi-summary.rst2 Overview of Linux kernel SPI support
5 02-Feb-2012
7 What is SPI?
8 ------------
9 The "Serial Peripheral Interface" (SPI) is a synchronous four wire serial
12 standardization body. SPI uses a host/target configuration.
17 clocking modes through which data is exchanged; mode-0 and mode-3 are most
22 SPI hosts use a fourth "chip select" line to activate a given SPI target
24 in parallel. All SPI targets support chipselects; they are usually active
29 SPI target functions are usually not interoperable between vendors
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/linux-6.14.4/drivers/spi/
DKconfig1 # SPDX-License-Identifier: GPL-2.0-only
3 # SPI driver configuration
5 menuconfig SPI config
6 bool "SPI support"
10 protocol. Chips that support SPI can have data transfer rates
12 controller and a chipselect. Most SPI slaves don't support
13 dynamic device discovery; some are even write-only or read-only.
15 SPI is widely used by microcontrollers to talk with sensors,
17 chips, analog to digital (and d-to-a) converters, and more.
18 MMC and SD cards can be accessed using SPI protocol; and for
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/linux-6.14.4/Documentation/ABI/testing/
Dsysfs-bus-spi-devices-spi-nor1 What: /sys/bus/spi/devices/.../spi-nor/jedec_id
4 Contact: linux-[email protected]
5 Description: (RO) The JEDEC ID of the SPI NOR flash as reported by the
10 non-JEDEC compliant flashes.
12 What: /sys/bus/spi/devices/.../spi-nor/manufacturer
15 Contact: linux-[email protected]
16 Description: (RO) Manufacturer of the SPI NOR flash.
22 What: /sys/bus/spi/devices/.../spi-nor/partname
25 Contact: linux-[email protected]
26 Description: (RO) Part name of the SPI NOR flash.
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/linux-6.14.4/arch/arm/boot/dts/aspeed/
Dibm-power10-dual.dtsi1 // SPDX-License-Identifier: GPL-2.0-or-later
7 #address-cells = <2>;
8 #size-cells = <0>;
10 cfam-reset-gpios = <&gpio0 ASPEED_GPIO(Q, 0) GPIO_ACTIVE_HIGH>;
14 #address-cells = <1>;
15 #size-cells = <1>;
16 chip-id = <0>;
24 compatible = "ibm,fsi-i2c-master";
26 #address-cells = <1>;
27 #size-cells = <0>;
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Daspeed-g6.dtsi1 // SPDX-License-Identifier: GPL-2.0-or-later
4 #include <dt-bindings/interrupt-controller/arm-gic.h>
5 #include <dt-bindings/interrupt-controller/aspeed-scu-ic.h>
6 #include <dt-bindings/clock/ast2600-clock.h>
11 #address-cells = <1>;
12 #size-cells = <1>;
13 interrupt-parent = <&gic>;
47 #address-cells = <1>;
48 #size-cells = <0>;
49 enable-method = "aspeed,ast2600-smp";
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Dibm-power11-quad.dtsi1 // SPDX-License-Identifier: GPL-2.0-or-later
125 #address-cells = <2>;
126 #size-cells = <0>;
128 bus-frequency = <100000000>;
129 cfam-reset-gpios = <&gpio0 ASPEED_GPIO(Q, 0) GPIO_ACTIVE_HIGH>;
133 #address-cells = <1>;
134 #size-cells = <1>;
135 chip-id = <0>;
138 compatible = "ibm,p9-scom";
143 compatible = "ibm,i2c-fsi";
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/linux-6.14.4/arch/arm64/boot/dts/freescale/
Dfsl-ls1088a-qds.dts1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
11 /dts-v1/;
13 #include "fsl-ls1088a.dtsi"
17 compatible = "fsl,ls1088a-qds", "fsl,ls1088a";
21 bus-num = <0>;
25 #address-cells = <1>;
26 #size-cells = <1>;
27 compatible = "jedec,spi-nor";
29 spi-max-frequency = <1000000>;
33 #address-cells = <1>;
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Dfsl-ls1046a-tqmls1046a.dtsi1 // SPDX-License-Identifier: (GPL-2.0-or-later OR MIT)
3 * Copyright (c) 2018-2023 TQ-Systems GmbH <[email protected]-group.com>,
4 * D-82229 Seefeld, Germany.
10 #include "fsl-ls1046a.dtsi"
14 num-cs = <2>;
18 compatible = "jedec,spi-nor";
20 #address-cells = <1>;
21 #size-cells = <1>;
22 spi-max-frequency = <62500000>;
23 spi-rx-bus-width = <4>;
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Dfsl-ls1088a-tqmls1088a.dtsi1 // SPDX-License-Identifier: (GPL-2.0-or-later OR MIT)
3 * Copyright (c) 2018-2023 TQ-Systems GmbH <[email protected]-group.com>,
4 * D-82229 Seefeld, Germany.
10 #include "fsl-ls1088a.dtsi"
14 num-cs = <2>;
18 compatible = "jedec,spi-nor";
20 #address-cells = <1>;
21 #size-cells = <1>;
22 spi-max-frequency = <62500000>;
23 spi-rx-bus-width = <4>;
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Dfsl-ls1028a-qds.dts1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
11 /dts-v1/;
13 #include "fsl-ls1028a.dtsi"
17 compatible = "fsl,ls1028a-qds", "fsl,ls1028a";
32 stdout-path = "serial0:115200n8";
40 sys_mclk: clock-mclk {
41 compatible = "fixed-clock";
42 #clock-cells = <0>;
43 clock-frequency = <25000000>;
46 reg_1p8v: regulator-1p8v {
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Dfsl-lx2160a-tqmlx2160a.dtsi1 // SPDX-License-Identifier: GPL-2.0-or-later OR MIT
3 * Copyright (c) 2020-2023 TQ-Systems GmbH <[email protected]-group.com>,
4 * D-82229 Seefeld, Germany.
8 #include "fsl-lx2160a.dtsi"
11 reg_vcc3v3: regulator-vcc3v3 {
12 compatible = "regulator-fixed";
13 regulator-name = "VCC3V3";
14 regulator-min-microvolt = <3300000>;
15 regulator-max-microvolt = <3300000>;
16 regulator-always-on;
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Dfsl-ls2081a-rdb.dts1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
11 /dts-v1/;
13 #include "fsl-ls2088a.dtsi"
17 compatible = "fsl,ls2081a-rdb", "fsl,ls2081a";
25 stdout-path = "serial1:115200n8";
33 compatible = "jedec,spi-nor";
34 #address-cells = <1>;
35 #size-cells = <1>;
36 spi-max-frequency = <3000000>;
51 #address-cells = <1>;
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/linux-6.14.4/Documentation/devicetree/bindings/bus/
Dmoxtet.txt1 Turris Mox module status and configuration bus (over SPI)
4 - compatible : Should be "cznic,moxtet"
5 - #address-cells : Has to be 1
6 - #size-cells : Has to be 0
7 - spi-cpol : Required inverted clock polarity
8 - spi-cpha : Required shifted clock phase
9 - interrupts : Must contain reference to the shared interrupt line
10 - interrupt-controller : Required
11 - #interrupt-cells : Has to be 1
13 For other required and optional properties of SPI slave nodes please refer to
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/linux-6.14.4/Documentation/devicetree/bindings/net/
Dmicrel,ks8851.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Micrel KS8851 Ethernet MAC (SPI and Parallel bus options)
10 - Marek Vasut <[email protected]>
15 - micrel,ks8851 # SPI bus option
16 - micrel,ks8851-mll # Parallel bus option
24 - description: SPI or Parallel bus hardware address
25 - description: Parallel bus command mode address
27 reset-gpios:
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/linux-6.14.4/Documentation/driver-api/mtd/
Dspi-nor.rst2 SPI NOR framework
6 -----------------------------------
8 Most SPI NOR flashes comply with the JEDEC JESD216
11 standard set of internal read-only parameter tables.
13 The SPI NOR driver queries the SFDP tables in order to determine the
17 on its SFDP data. All one has to do is to specify the "jedec,spi-nor"
28 -----------------------------
31 section, after the ``---`` marker.
37 frequency using the Z (put compatible) SPI controller.
41 root@1:~# cat /sys/bus/spi/devices/spi0.0/spi-nor/partname
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/linux-6.14.4/Documentation/devicetree/bindings/mtd/
Dnxp-spifi.txt1 * NXP SPI Flash Interface (SPIFI)
3 NXP SPIFI is a specialized SPI interface for serial Flash devices.
4 It supports one Flash device with 1-, 2- and 4-bits width in SPI
10 - compatible : Should be "nxp,lpc1773-spifi"
11 - reg : the first contains the register location and length,
13 - reg-names: Should contain the reg names "spifi" and "flash"
14 - interrupts : Should contain the interrupt for the device
15 - clocks : The clocks needed by the SPIFI controller
16 - clock-names : Should contain the clock names "spifi" and "reg"
19 - resets : phandle + reset specifier
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/linux-6.14.4/drivers/net/wireless/silabs/wfx/
Dbus_spi.c1 // SPDX-License-Identifier: GPL-2.0-only
3 * SPI interface.
5 * Copyright (c) 2017-2020, Silicon Laboratories, Inc.
7 * Copyright (c) 2010, ST-Ericsson
12 #include <linux/spi/spi.h>
17 #include "bus.h"
62 * support big endian host and commonly used SPI 8bits.
66 struct wfx_spi_priv *bus = priv; in wfx_spi_copy_from_io() local
83 if (bus->need_swab) in wfx_spi_copy_from_io()
89 ret = spi_sync(bus->func, &m); in wfx_spi_copy_from_io()
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/linux-6.14.4/drivers/net/ethernet/wiznet/
DKconfig1 # SPDX-License-Identifier: GPL-2.0-only
52 bool "Direct address bus mode"
55 after mapping to Memory-Mapped I/O space.
58 bool "Indirect address bus mode"
62 which are directly mapped to Memory-Mapped I/O space.
70 Performance may decrease compared to explicitly selected bus mode.
74 tristate "WIZnet W5100/W5200/W5500 Ethernet support for SPI mode"
76 depends on SPI
78 In SPI mode host system accesses registers using SPI protocol
79 (mode 0) on the SPI bus.
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