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/linux-6.14.4/Documentation/devicetree/bindings/iommu/
Darm,smmu.yaml1 # SPDX-License-Identifier: GPL-2.0-only
3 ---
4 $id: http://devicetree.org/schemas/iommu/arm,smmu.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Will Deacon <[email protected]>
11 - Robin Murphy <[email protected]>
18 The SMMU may also raise interrupts in response to various fault
23 pattern: "^iommu@[0-9a-f]*"
26 - description: Qcom SoCs implementing "arm,smmu-v2"
28 - enum:
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/linux-6.14.4/drivers/iommu/arm/arm-smmu/
Darm-smmu-impl.c1 // SPDX-License-Identifier: GPL-2.0-only
2 // Miscellaneous Arm SMMU implementation and integration quirks
5 #define pr_fmt(fmt) "arm-smmu: " fmt
10 #include "arm-smmu.h"
28 static u32 arm_smmu_read_ns(struct arm_smmu_device *smmu, int page, in arm_smmu_read_ns() argument
33 return readl_relaxed(arm_smmu_page(smmu, page) + offset); in arm_smmu_read_ns()
36 static void arm_smmu_write_ns(struct arm_smmu_device *smmu, int page, in arm_smmu_write_ns() argument
41 writel_relaxed(val, arm_smmu_page(smmu, page) + offset); in arm_smmu_write_ns()
44 /* Since we don't care for sGFAR, we can do without 64-bit accessors */
52 struct arm_smmu_device smmu; member
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/linux-6.14.4/arch/arm64/boot/dts/xilinx/
Dzynqmp.dtsi1 // SPDX-License-Identifier: GPL-2.0+
5 * (C) Copyright 2014 - 2021, Xilinx, Inc.
15 #include <dt-bindings/dma/xlnx-zynqmp-dpdma.h>
16 #include <dt-bindings/gpio/gpio.h>
17 #include <dt-bindings/interrupt-controller/arm-gic.h>
18 #include <dt-bindings/interrupt-controller/irq.h>
19 #include <dt-bindings/power/xlnx-zynqmp-power.h>
20 #include <dt-bindings/reset/xlnx-zynqmp-resets.h>
21 #include <dt-bindings/thermal/thermal.h>
25 #address-cells = <2>;
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/linux-6.14.4/arch/arm64/boot/dts/arm/
Djuno-base.dtsi1 // SPDX-License-Identifier: GPL-2.0
2 #include "juno-clocks.dtsi"
3 #include "juno-motherboard.dtsi"
11 compatible = "arm,armv7-timer-mem";
13 clock-frequency = <50000000>;
14 #address-cells = <1>;
15 #size-cells = <1>;
19 frame-number = <1>;
31 #mbox-cells = <1>;
33 clock-names = "apb_pclk";
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/linux-6.14.4/drivers/gpu/drm/msm/adreno/
Da5xx_gpu.c1 // SPDX-License-Identifier: GPL-2.0-only
2 /* Copyright (c) 2016-2017 The Linux Foundation. All rights reserved.
10 #include <linux/nvmem-consumer.h>
26 if (a5xx_gpu->has_whereami) { in update_shadow_rptr()
48 spin_lock_irqsave(&ring->preempt_lock, flags); in a5xx_flush()
51 ring->cur = ring->next; in a5xx_flush()
56 spin_unlock_irqrestore(&ring->preempt_lock, flags); in a5xx_flush()
62 if (a5xx_gpu->cur_ring == ring && !a5xx_in_preempt(a5xx_gpu)) in a5xx_flush()
70 struct msm_ringbuffer *ring = submit->ring; in a5xx_submit_in_rb()
75 for (i = 0; i < submit->nr_cmds; i++) { in a5xx_submit_in_rb()
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Da6xx_gpu.c1 // SPDX-License-Identifier: GPL-2.0
2 /* Copyright (c) 2017-2019 The Linux Foundation. All rights reserved. */
15 #include <linux/soc/qcom/llcc-qcom.h>
25 if (!adreno_has_gmu_wrapper(adreno_gpu) && !a6xx_gmu_isidle(&a6xx_gpu->gmu)) in _a6xx_check_idle()
45 gpu->name, __builtin_return_address(0), in a6xx_idle()
62 if (a6xx_gpu->has_whereami && !adreno_gpu->base.hw_apriv) { in update_shadow_rptr()
78 spin_lock_irqsave(&ring->preempt_lock, flags); in a6xx_flush()
81 ring->cur = ring->next; in a6xx_flush()
88 if (a6xx_gpu->cur_ring == ring) in a6xx_flush()
91 ring->restore_wptr = true; in a6xx_flush()
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Dadreno_gpu.h1 /* SPDX-License-Identifier: GPL-2.0-only */
33 * @enum adreno_family: identify generation and possibly sub-generation
35 * In some cases there are distinct sub-generations within a major revision
37 * necessary sub-generation.
91 * @chipids: Table of matching chip-ids
133 * -----+---------
186 * of gpu firmware to linux-firmware, the fw files were
188 * android kernel. But linux-firmware preferred they be
216 /** @min_acc_len: Whether the minimum access length is 64 bits */
240 * Whether to use 4-channel macrotiling mode or the newer
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/linux-6.14.4/include/acpi/
Dactbl2.h1 /* SPDX-License-Identifier: BSD-3-Clause OR GPL-2.0 */
4 * Name: actbl2.h - ACPI Table Definitions (tables not in ACPI spec)
6 * Copyright (C) 2000 - 2023, Intel Corp.
52 #define ACPI_SIG_RHCT "RHCT" /* RISC-V Hart Capabilities Table */
55 #define ACPI_SIG_SDEV "SDEV" /* Secure Devices table */
60 * All tables must be byte-packed to match the ACPI specification, since
70 * essentially useless for dealing with packed data in on-disk formats or
79 * AEST - Arm Error Source Table
90 /* Common Subtable header - one per Node Structure (Subtable) */
176 /* 2: Smmu Error */
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/linux-6.14.4/
DMAINTAINERS5 ---------------------------------------------------
21 W: *Web-page* with status/info
23 B: URI for where to file *bugs*. A web-page with detailed bug
28 patches to the given subsystem. This is either an in-tree file,
29 or a URI. See Documentation/maintainer/maintainer-entry-profile.rst
46 N: [^a-z]tegra all files whose path contains tegra
64 ----------------
83 3WARE SAS/SATA-RAID SCSI DRIVERS (3W-XXXX, 3W-9XXX, 3W-SAS)
85 L: linux-[email protected]
88 F: drivers/scsi/3w-*
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