Searched +full:qoriq +full:- +full:clockgen +full:- +full:1 (Results 1 – 25 of 33) sorted by relevance
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/linux-6.14.4/Documentation/devicetree/bindings/clock/ |
D | fsl,qoriq-clock.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/clock/fsl,qoriq-clock.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 7 title: Clock Block on Freescale QorIQ Platforms 10 - Frank Li <[email protected]> 13 Freescale QorIQ chips take primary clocking input from the external 20 All references to "1.0" and "2.0" refer to the QorIQ chassis version to 24 --------------- ------------- 30 The clockgen node should act as a clock provider, though in older device [all …]
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/linux-6.14.4/arch/arm64/boot/dts/freescale/ |
D | fsl-ls208xa.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT) 3 * Device Tree Include file for Freescale Layerscape-2080A family SoC. 6 * Copyright 2017-2020 NXP 12 #include <dt-bindings/clock/fsl,qoriq-clockgen.h> 13 #include <dt-bindings/thermal/thermal.h> 14 #include <dt-bindings/interrupt-controller/arm-gic.h> 18 interrupt-parent = <&gic>; 19 #address-cells = <2>; 20 #size-cells = <2>; 32 #address-cells = <1>; [all …]
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D | fsl-ls1088a.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT) 3 * Device Tree Include file for NXP Layerscape-1088A family SoC. 5 * Copyright 2017-2020 NXP 10 #include <dt-bindings/clock/fsl,qoriq-clockgen.h> 11 #include <dt-bindings/interrupt-controller/arm-gic.h> 12 #include <dt-bindings/thermal/thermal.h> 16 interrupt-parent = <&gic>; 17 #address-cells = <2>; 18 #size-cells = <2>; 26 #address-cells = <1>; [all …]
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D | fsl-lx2160a.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0 OR MIT) 3 // Device Tree Include file for Layerscape-LX2160A family SoC. 5 // Copyright 2018-2020 NXP 7 #include <dt-bindings/clock/fsl,qoriq-clockgen.h> 8 #include <dt-bindings/gpio/gpio.h> 9 #include <dt-bindings/interrupt-controller/arm-gic.h> 10 #include <dt-bindings/thermal/thermal.h> 16 interrupt-parent = <&gic>; 17 #address-cells = <2>; 18 #size-cells = <2>; [all …]
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D | fsl-ls1046a.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT) 3 * Device Tree Include file for NXP Layerscape-1046A family SoC. 11 #include <dt-bindings/clock/fsl,qoriq-clockgen.h> 12 #include <dt-bindings/interrupt-controller/arm-gic.h> 13 #include <dt-bindings/thermal/thermal.h> 14 #include <dt-bindings/gpio/gpio.h> 18 interrupt-parent = <&gic>; 19 #address-cells = <2>; 20 #size-cells = <2>; 37 #address-cells = <1>; [all …]
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D | fsl-ls1043a.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT) 3 * Device Tree Include file for NXP Layerscape-1043A family SoC. 5 * Copyright 2014-2015 Freescale Semiconductor, Inc. 11 #include <dt-bindings/clock/fsl,qoriq-clockgen.h> 12 #include <dt-bindings/thermal/thermal.h> 13 #include <dt-bindings/interrupt-controller/arm-gic.h> 14 #include <dt-bindings/gpio/gpio.h> 18 interrupt-parent = <&gic>; 19 #address-cells = <2>; 20 #size-cells = <2>; [all …]
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D | fsl-ls1012a.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT) 3 * Device Tree Include file for NXP Layerscape-1012A family SoC. 6 * Copyright 2019-2020 NXP 10 #include <dt-bindings/clock/fsl,qoriq-clockgen.h> 11 #include <dt-bindings/interrupt-controller/arm-gic.h> 12 #include <dt-bindings/thermal/thermal.h> 16 interrupt-parent = <&gic>; 17 #address-cells = <2>; 18 #size-cells = <2>; 23 rtic-a = &rtic_a; [all …]
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D | qoriq-fman3-0.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause) 3 * QorIQ FMan v3 device tree 5 * Copyright 2012-2015 Freescale Semiconductor Inc. 9 #include <dt-bindings/clock/fsl,qoriq-clockgen.h> 11 fman0: fman@1a00000 { 12 #address-cells = <1>; 13 #size-cells = <1>; 14 cell-index = <0>; 20 clocks = <&clockgen QORIQ_CLK_FMAN 0>; 21 clock-names = "fmanclk"; [all …]
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D | fsl-ls1028a.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT) 3 * Device Tree Include file for NXP Layerscape-1028A family SoC. 5 * Copyright 2018-2020 NXP 11 #include <dt-bindings/clock/fsl,qoriq-clockgen.h> 12 #include <dt-bindings/interrupt-controller/arm-gic.h> 13 #include <dt-bindings/thermal/thermal.h> 17 interrupt-parent = <&gic>; 18 #address-cells = <2>; 19 #size-cells = <2>; 22 #address-cells = <1>; [all …]
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D | fsl-ls2088a.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT) 3 * Device Tree Include file for Freescale Layerscape-2088A family SoC. 12 #include <dt-bindings/clock/fsl,qoriq-clockgen.h> 13 #include "fsl-ls208xa.dtsi" 17 compatible = "arm,cortex-a72-pmu"; 25 compatible = "arm,cortex-a72"; 27 clocks = <&clockgen QORIQ_CLK_CMUX 0>; 28 cpu-idle-states = <&CPU_PW20>; 29 next-level-cache = <&cluster0_l2>; 30 #cooling-cells = <2>; [all …]
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D | fsl-ls2080a.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT) 3 * Device Tree Include file for Freescale Layerscape-2080A family SoC. 5 * Copyright 2014-2016 Freescale Semiconductor, Inc. 12 #include <dt-bindings/clock/fsl,qoriq-clockgen.h> 13 #include "fsl-ls208xa.dtsi" 17 compatible = "arm,cortex-a57-pmu"; 25 compatible = "arm,cortex-a57"; 27 clocks = <&clockgen QORIQ_CLK_CMUX 0>; 28 cpu-idle-states = <&CPU_PW20>; 29 next-level-cache = <&cluster0_l2>; [all …]
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D | fsl-ls1028a-kontron-sl28-var3-ads2.dts | 1 // SPDX-License-Identifier: GPL-2.0+ 3 * Device Tree file for the Kontron SMARC-sAL28 board on a SMARC Eval 2.0 10 /dts-v1/; 12 #include <dt-bindings/clock/fsl,qoriq-clockgen.h> 13 #include "fsl-ls1028a-kontron-sl28-var3.dts" 16 model = "Kontron SMARC-sAL28 (Single PHY) on SMARC Eval 2.0 carrier"; 17 compatible = "kontron,sl28-var3-ads2", "kontron,sl28-var3", 20 pwm-fan { 21 compatible = "pwm-fan"; 22 #cooling-cells = <2>; [all …]
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/linux-6.14.4/drivers/clk/ |
D | clk-qoriq.c | 1 // SPDX-License-Identifier: GPL-2.0-only 6 * clock driver for Freescale QorIQ SoCs. 11 #include <dt-bindings/clock/fsl,qoriq-clockgen.h> 14 #include <linux/clk-provider.h> 26 #define PLL_DIV2 1 31 #define CGA_PLL1 1 34 #define CGA_PLL4 4 /* only on clockgen-1.0, which lacks CGB */ 48 #define CLKSEL_VALID 1 66 struct clockgen; 72 #define CG_CMUX_GE_PLAT 1 [all …]
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/linux-6.14.4/arch/arm/boot/dts/nxp/ls/ |
D | ls1021a.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT) 3 * Copyright 2013-2014 Freescale Semiconductor, Inc. 6 #include <dt-bindings/interrupt-controller/arm-gic.h> 7 #include <dt-bindings/thermal/thermal.h> 10 #address-cells = <2>; 11 #size-cells = <2>; 12 interrupt-parent = <&gic>; 30 #address-cells = <1>; 31 #size-cells = <0>; 34 compatible = "arm,cortex-a7"; [all …]
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/linux-6.14.4/drivers/cpufreq/ |
D | qoriq-cpufreq.c | 1 // SPDX-License-Identifier: GPL-2.0-only 5 * CPU Frequency Scaling driver for Freescale QorIQ SoCs. 11 #include <linux/clk-provider.h> 34 * struct soc_data - SoC specific data 48 /* get platform freq by searching bus-frequency property */ in get_bus_freq() 51 ret = of_property_read_u32(soc, "bus-frequency", &sysfreq); in get_bus_freq() 58 pltclk = clk_get(NULL, "cg-pll0-div1"); in get_bus_freq() 88 struct cpumask *dstp = policy->cpus; in set_affected_cpus() 99 if (clk_is_match(policy->clk, clk)) in set_affected_cpus() 110 for (i = 1; i < count; i++) { in freq_table_redup() [all …]
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/linux-6.14.4/arch/powerpc/boot/dts/fsl/ |
D | b4860si-post.dtsi | 4 * Copyright 2012 - 2015 Freescale Semiconductor Inc. 35 /include/ "b4si-post.dtsi" 39 compatible = "fsl,b4860-pcie", "fsl,qoriq-pcie-v2.4"; 44 interrupts = <16 2 1 20>; 45 #address-cells = <2>; 46 #size-cells = <2>; 47 fsl,iommu-parent = <&pamu0>; 51 #address-cells = <2>; 52 #size-cells = <2>; 53 cell-index = <1>; [all …]
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D | p5040si-post.dtsi | 4 * Copyright 2012 - 2015 Freescale Semiconductor Inc. 36 compatible = "fsl,bman-fbpr"; 37 alloc-ranges = <0 0 0x10000 0>; 41 compatible = "fsl,qman-fqd"; 42 alloc-ranges = <0 0 0x10000 0>; 46 compatible = "fsl,qman-pfdr"; 47 alloc-ranges = <0 0 0x10000 0>; 51 compatible = "fsl,p5040-elbc", "fsl,elbc", "simple-bus"; 53 #address-cells = <2>; 54 #size-cells = <1>; [all …]
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D | p5020si-post.dtsi | 4 * Copyright 2011 - 2015 Freescale Semiconductor Inc. 36 compatible = "fsl,bman-fbpr"; 37 alloc-ranges = <0 0 0x10000 0>; 41 compatible = "fsl,qman-fqd"; 42 alloc-ranges = <0 0 0x10000 0>; 46 compatible = "fsl,qman-pfdr"; 47 alloc-ranges = <0 0 0x10000 0>; 51 compatible = "fsl,p5020-elbc", "fsl,elbc", "simple-bus"; 53 #address-cells = <2>; 54 #size-cells = <1>; [all …]
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D | p3041si-post.dtsi | 4 * Copyright 2011 - 2015 Freescale Semiconductor Inc. 36 compatible = "fsl,bman-fbpr"; 37 alloc-ranges = <0 0 0x10 0>; 41 compatible = "fsl,qman-fqd"; 42 alloc-ranges = <0 0 0x10 0>; 46 compatible = "fsl,qman-pfdr"; 47 alloc-ranges = <0 0 0x10 0>; 51 compatible = "fsl,p3041-elbc", "fsl,elbc", "simple-bus"; 53 #address-cells = <2>; 54 #size-cells = <1>; [all …]
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D | p2041si-post.dtsi | 4 * Copyright 2011 - 2015 Freescale Semiconductor Inc. 36 compatible = "fsl,bman-fbpr"; 37 alloc-ranges = <0 0 0x10 0>; 41 compatible = "fsl,qman-fqd"; 42 alloc-ranges = <0 0 0x10 0>; 46 compatible = "fsl,qman-pfdr"; 47 alloc-ranges = <0 0 0x10 0>; 51 compatible = "fsl,p2041-elbc", "fsl,elbc", "simple-bus"; 53 #address-cells = <2>; 54 #size-cells = <1>; [all …]
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D | p4080si-post.dtsi | 4 * Copyright 2011 - 2015 Freescale Semiconductor Inc. 36 compatible = "fsl,bman-fbpr"; 37 alloc-ranges = <0 0 0x10 0>; 41 compatible = "fsl,qman-fqd"; 42 alloc-ranges = <0 0 0x10 0>; 46 compatible = "fsl,qman-pfdr"; 47 alloc-ranges = <0 0 0x10 0>; 51 compatible = "fsl,p4080-elbc", "fsl,elbc", "simple-bus"; 53 #address-cells = <2>; 54 #size-cells = <1>; [all …]
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D | t1023si-post.dtsi | 35 #include <dt-bindings/thermal/thermal.h> 38 compatible = "fsl,bman-fbpr"; 39 alloc-ranges = <0 0 0x10000 0>; 43 compatible = "fsl,qman-fqd"; 44 alloc-ranges = <0 0 0x10000 0>; 48 compatible = "fsl,qman-pfdr"; 49 alloc-ranges = <0 0 0x10000 0>; 53 #address-cells = <2>; 54 #size-cells = <1>; 60 compatible = "fsl,t1023-pcie", "fsl,qoriq-pcie-v2.4", "fsl,qoriq-pcie"; [all …]
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/linux-6.14.4/Documentation/devicetree/bindings/spi/ |
D | spi-nxp-fspi.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/spi/spi-nxp-fspi.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Han Xu <[email protected]> 11 - Kuldeep Singh <[email protected]> 14 - $ref: spi-controller.yaml# 19 - enum: 20 - nxp,imx8dxl-fspi 21 - nxp,imx8mm-fspi [all …]
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D | fsl,spi-fsl-qspi.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/spi/fsl,spi-fsl-qspi.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Han Xu <[email protected]> 13 - $ref: spi-controller.yaml# 18 - enum: 19 - fsl,vf610-qspi 20 - fsl,imx6sx-qspi 21 - fsl,imx7d-qspi [all …]
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/linux-6.14.4/Documentation/devicetree/bindings/nvmem/ |
D | fsl,layerscape-sfp.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/nvmem/fsl,layerscape-sfp.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Michael Walle <[email protected]> 17 - $ref: nvmem.yaml# 18 - $ref: nvmem-deprecated-cells.yaml 23 - description: Trust architecture 2.1 SFP 25 - const: fsl,ls1021a-sfp 26 - description: Trust architecture 3.0 SFP [all …]
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