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/linux-6.14.4/Documentation/devicetree/bindings/phy/
Dphy-cadence-torrent.yaml39 PHY input reference clocks - refclk (for PLL0) & pll1_refclk (for PLL1).
40 pll1_refclk is optional and used for multi-protocol configurations requiring
42 Same refclk is used for both PLL0 and PLL1 if no separate pll1_refclk is used.
50 - enum: [ pll1_refclk, phy_en_refclk ]
Dphy-cadence-sierra.yaml62 - const: pll1_refclk
/linux-6.14.4/drivers/phy/ti/
Dphy-j721e-wiz.c71 PLL1_REFCLK, enumerator
588 wiz->mux_sel_field[PLL1_REFCLK] = in wiz_regfield_init()
590 if (IS_ERR(wiz->mux_sel_field[PLL1_REFCLK])) { in wiz_regfield_init()
592 return PTR_ERR(wiz->mux_sel_field[PLL1_REFCLK]); in wiz_regfield_init()
/linux-6.14.4/arch/arm64/boot/dts/ti/
Dk3-j721e-main.dtsi755 "pll0_refclk", "pll1_refclk";
815 "pll0_refclk", "pll1_refclk";
875 "pll0_refclk", "pll1_refclk";
935 "pll0_refclk", "pll1_refclk";
/linux-6.14.4/drivers/phy/cadence/
Dphy-cadence-sierra.c301 #define PLL1_REFCLK_NAME "pll1_refclk"
Dphy-cadence-torrent.c2765 cdns_phy->clk1 = devm_clk_get_optional(cdns_phy->dev, "pll1_refclk"); in cdns_torrent_of_get_clk()