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/linux-6.14.4/Documentation/devicetree/bindings/net/
Dfsl,enetc-ierb.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/net/fsl,enetc-ierb.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
11 which preconfigures the FIFO limits for the ENETC ports.
14 - Frank Li <[email protected]>
15 - Vladimir Oltean <[email protected]>
16 - Wei Fang <[email protected]>
17 - Claudiu Manoil <[email protected]>
22 - fsl,ls1028a-enetc-ierb
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/linux-6.14.4/drivers/net/ethernet/freescale/enetc/
DKconfig1 # SPDX-License-Identifier: GPL-2.0
6 drivers for the NXP ENETC controller.
8 If compiled as module (M), the module name is fsl-enetc-core.
14 different versions of NXP ENETC PF controllers.
16 If compiled as module (M), the module name is nxp-enetc-pf-common.
19 tristate "ENETC PF driver"
30 This driver supports NXP ENETC gigabit ethernet controller PCIe
31 physical function (PF) devices, managing ENETC Ports at a privileged
34 If compiled as module (M), the module name is fsl-enetc.
46 This driver supports NXP ENETC devices with major revision 4. ENETC is
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Denetc_ierb.c1 // SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause)
4 * The Integrated Endpoint Register Block (IERB) is configured by pre-boot
5 * software and is supposed to be to ENETC what a NVRAM is to a 'real' PCIe
6 * card. Upon FLR, values from the IERB are transferred to the ENETC PFs, and
7 * are read-only in the PF memory space.
9 * This driver fixes up the power-on reset values for the ENETC shared FIFO,
25 #include "enetc.h"
28 /* IERB registers */
42 static void enetc_ierb_write(struct enetc_ierb *ierb, u32 offset, u32 val) in enetc_ierb_write() argument
44 iowrite32(val, ierb->regs + offset); in enetc_ierb_write()
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Denetc_pf.c1 // SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause)
2 /* Copyright 2017-2019 NXP */
9 #include <linux/pcs-lynx.h>
13 #define ENETC_DRV_NAME_STR "ENETC PF driver"
17 u32 upper = __raw_readl(hw->port + ENETC_PSIPMAR0(si)); in enetc_pf_get_primary_mac_addr()
18 u16 lower = __raw_readw(hw->port + ENETC_PSIPMAR1(si)); in enetc_pf_get_primary_mac_addr()
30 __raw_writel(upper, hw->port + ENETC_PSIPMAR0(si)); in enetc_pf_set_primary_mac_addr()
31 __raw_writew(lower, hw->port + ENETC_PSIPMAR1(si)); in enetc_pf_set_primary_mac_addr()
55 pf->vlan_promisc_simap |= BIT(si_idx); in enetc_enable_si_vlan_promisc()
56 enetc_set_vlan_promisc(&pf->si->hw, pf->vlan_promisc_simap); in enetc_enable_si_vlan_promisc()
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/linux-6.14.4/arch/arm64/boot/dts/freescale/
Dfsl-ls1028a.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
3 * Device Tree Include file for NXP Layerscape-1028A family SoC.
5 * Copyright 2018-2020 NXP
11 #include <dt-bindings/clock/fsl,qoriq-clockgen.h>
12 #include <dt-bindings/interrupt-controller/arm-gic.h>
13 #include <dt-bindings/thermal/thermal.h>
16 compatible = "fsl,ls1028a";
17 interrupt-parent = <&gic>;
18 #address-cells = <2>;
19 #size-cells = <2>;
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