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/linux-6.14.4/Documentation/devicetree/bindings/mtd/
Dbrcm,brcmnand.yaml1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
3 ---
4 $id: http://devicetree.org/schemas/mtd/brcm,brcmnand.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Brian Norris <[email protected]>
11 - Kamal Dasu <[email protected]>
12 - William Zhang <[email protected]>
15 The Broadcom Set-Top Box NAND controller supports low-level access to raw NAND
16 flash chips. It has a memory-mapped register interface for both control
27 -- Additional SoC-specific NAND controller properties --
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/linux-6.14.4/drivers/mtd/nand/raw/brcmnand/
Dbrcmnand.c1 // SPDX-License-Identifier: GPL-2.0-only
3 * Copyright © 2010-2015 Broadcom Corporation
12 #include <linux/platform_data/brcmnand.h>
17 #include <linux/dma-mapping.h>
33 #include "brcmnand.h"
49 #define DRV_NAME "brcmnand"
237 /* List of NAND hosts (one for each chip-select) */
240 /* EDU info, per-transaction */
261 /* in-memory cache of the FLASH_CACHE, used only for some commands */
267 const u8 *cs_offsets; /* within each chip-select */
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/linux-6.14.4/arch/arm/boot/dts/broadcom/
Dbcm63148.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
6 #include <dt-bindings/interrupt-controller/arm-gic.h>
7 #include <dt-bindings/interrupt-controller/irq.h>
11 #address-cells = <1>;
12 #size-cells = <1>;
14 interrupt-parent = <&gic>;
17 #address-cells = <1>;
18 #size-cells = <0>;
22 compatible = "brcm,brahma-b15";
24 next-level-cache = <&L2_0>;
[all …]
Dbcm6878.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
6 #include <dt-bindings/interrupt-controller/arm-gic.h>
7 #include <dt-bindings/interrupt-controller/irq.h>
11 #address-cells = <1>;
12 #size-cells = <1>;
14 interrupt-parent = <&gic>;
17 #address-cells = <1>;
18 #size-cells = <0>;
22 compatible = "arm,cortex-a7";
24 next-level-cache = <&L2_0>;
[all …]
Dbcm6855.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
6 #include <dt-bindings/interrupt-controller/arm-gic.h>
7 #include <dt-bindings/interrupt-controller/irq.h>
11 #address-cells = <1>;
12 #size-cells = <1>;
14 interrupt-parent = <&gic>;
17 #address-cells = <1>;
18 #size-cells = <0>;
22 compatible = "arm,cortex-a7";
24 next-level-cache = <&L2_0>;
[all …]
Dbcm63178.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
6 #include <dt-bindings/interrupt-controller/arm-gic.h>
7 #include <dt-bindings/interrupt-controller/irq.h>
11 #address-cells = <1>;
12 #size-cells = <1>;
14 interrupt-parent = <&gic>;
17 #address-cells = <1>;
18 #size-cells = <0>;
22 compatible = "arm,cortex-a7";
24 next-level-cache = <&L2_0>;
[all …]
Dbcm6756.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
6 #include <dt-bindings/interrupt-controller/arm-gic.h>
7 #include <dt-bindings/interrupt-controller/irq.h>
11 #address-cells = <1>;
12 #size-cells = <1>;
14 interrupt-parent = <&gic>;
17 #address-cells = <1>;
18 #size-cells = <0>;
22 compatible = "arm,cortex-a7";
24 next-level-cache = <&L2_0>;
[all …]
Dbcm47622.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
6 #include <dt-bindings/interrupt-controller/arm-gic.h>
7 #include <dt-bindings/interrupt-controller/irq.h>
11 #address-cells = <1>;
12 #size-cells = <1>;
14 interrupt-parent = <&gic>;
17 #address-cells = <1>;
18 #size-cells = <0>;
22 compatible = "arm,cortex-a7";
24 next-level-cache = <&L2_0>;
[all …]
Dbcm63138.dtsi1 // SPDX-License-Identifier: GPL-2.0
6 #include <dt-bindings/interrupt-controller/arm-gic.h>
7 #include <dt-bindings/interrupt-controller/irq.h>
10 #address-cells = <1>;
11 #size-cells = <1>;
14 interrupt-parent = <&gic>;
22 #address-cells = <1>;
23 #size-cells = <0>;
27 compatible = "arm,cortex-a9";
28 next-level-cache = <&L2>;
[all …]
Dbcm6846.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
6 #include <dt-bindings/interrupt-controller/arm-gic.h>
7 #include <dt-bindings/interrupt-controller/irq.h>
11 #address-cells = <1>;
12 #size-cells = <1>;
14 interrupt-parent = <&gic>;
17 #address-cells = <1>;
18 #size-cells = <0>;
22 compatible = "arm,cortex-a7";
24 next-level-cache = <&L2_0>;
[all …]
Dbcm7445.dtsi1 // SPDX-License-Identifier: GPL-2.0
2 #include <dt-bindings/interrupt-controller/arm-gic.h>
5 #address-cells = <2>;
6 #size-cells = <2>;
9 interrupt-parent = <&gic>;
16 #address-cells = <1>;
17 #size-cells = <0>;
20 compatible = "brcm,brahma-b15";
22 enable-method = "brcm,brahma-b15";
27 compatible = "brcm,brahma-b15";
[all …]
/linux-6.14.4/arch/arm64/boot/dts/broadcom/bcmbca/
Dbcm6856.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
6 #include <dt-bindings/interrupt-controller/irq.h>
7 #include <dt-bindings/interrupt-controller/arm-gic.h>
11 #address-cells = <2>;
12 #size-cells = <2>;
14 interrupt-parent = <&gic>;
17 #address-cells = <2>;
18 #size-cells = <0>;
21 compatible = "brcm,brahma-b53";
24 next-level-cache = <&L2_0>;
[all …]
Dbcm63146.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
6 #include <dt-bindings/interrupt-controller/irq.h>
7 #include <dt-bindings/interrupt-controller/arm-gic.h>
11 #address-cells = <2>;
12 #size-cells = <2>;
14 interrupt-parent = <&gic>;
17 #address-cells = <2>;
18 #size-cells = <0>;
21 compatible = "brcm,brahma-b53";
24 next-level-cache = <&L2_0>;
[all …]
Dbcm4912.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
6 #include <dt-bindings/interrupt-controller/irq.h>
7 #include <dt-bindings/interrupt-controller/arm-gic.h>
11 #address-cells = <2>;
12 #size-cells = <2>;
14 interrupt-parent = <&gic>;
17 #address-cells = <2>;
18 #size-cells = <0>;
21 compatible = "brcm,brahma-b53";
24 next-level-cache = <&L2_0>;
[all …]
Dbcm6813.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
6 #include <dt-bindings/interrupt-controller/irq.h>
7 #include <dt-bindings/interrupt-controller/arm-gic.h>
11 #address-cells = <2>;
12 #size-cells = <2>;
14 interrupt-parent = <&gic>;
17 #address-cells = <2>;
18 #size-cells = <0>;
21 compatible = "brcm,brahma-b53";
24 next-level-cache = <&L2_0>;
[all …]
Dbcm63158.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
6 #include <dt-bindings/interrupt-controller/irq.h>
7 #include <dt-bindings/interrupt-controller/arm-gic.h>
11 #address-cells = <2>;
12 #size-cells = <2>;
14 interrupt-parent = <&gic>;
17 #address-cells = <2>;
18 #size-cells = <0>;
21 compatible = "brcm,brahma-b53";
24 next-level-cache = <&L2_0>;
[all …]
Dbcm6858.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
6 #include <dt-bindings/interrupt-controller/irq.h>
7 #include <dt-bindings/interrupt-controller/arm-gic.h>
11 #address-cells = <2>;
12 #size-cells = <2>;
14 interrupt-parent = <&gic>;
17 #address-cells = <2>;
18 #size-cells = <0>;
21 compatible = "brcm,brahma-b53";
24 next-level-cache = <&L2_0>;
[all …]
Dbcm4908.dtsi1 // SPDX-License-Identifier: GPL-2.0-or-later OR MIT
3 #include <dt-bindings/interrupt-controller/irq.h>
4 #include <dt-bindings/interrupt-controller/arm-gic.h>
5 #include <dt-bindings/phy/phy.h>
6 #include <dt-bindings/soc/bcm-pmb.h>
8 /dts-v1/;
11 interrupt-parent = <&gic>;
13 #address-cells = <2>;
14 #size-cells = <2>;
21 stdout-path = "serial0:115200n8";
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