Searched +full:am654 +full:- +full:sdhci +full:- +full:5 (Results 1 – 10 of 10) sorted by relevance
1 // SPDX-License-Identifier: GPL-2.0-only OR MIT5 * Copyright (C) 2020-2024 Texas Instruments Incorporated - https://www.ti.com/9 serdes_refclk: serdes-refclk {10 #clock-cells = <0>;11 compatible = "fixed-clock";17 compatible = "mmio-sram";19 #address-cells = <1>;20 #size-cells = <1>;23 atf-sram@0 {28 scm_conf: scm-conf@100000 {[all …]
1 // SPDX-License-Identifier: GPL-2.0-only OR MIT5 * Copyright (C) 2022-2024 Texas Instruments Incorporated - https://www.ti.com/10 compatible = "mmio-sram";12 #address-cells = <1>;13 #size-cells = <1>;17 gic500: interrupt-controller@1800000 {18 compatible = "arm,gic-v3";24 #address-cells = <2>;25 #size-cells = <2>;27 #interrupt-cells = <3>;[all …]
1 // SPDX-License-Identifier: GPL-2.0-only OR MIT5 * Copyright (C) 2020-2024 Texas Instruments Incorporated - https://www.ti.com/10 compatible = "mmio-sram";12 #address-cells = <1>;13 #size-cells = <1>;17 gic500: interrupt-controller@1800000 {18 compatible = "arm,gic-v3";19 #address-cells = <2>;20 #size-cells = <2>;22 #interrupt-cells = <3>;[all …]
1 // SPDX-License-Identifier: GPL-2.0-only OR MIT5 * Copyright (C) 2016-2024 Texas Instruments Incorporated - https://www.ti.com/7 #include <dt-bindings/phy/phy-am654-serdes.h>11 compatible = "mmio-sram";13 #address-cells = <1>;14 #size-cells = <1>;17 atf-sram@0 {21 sysfw-sram@f0000 {25 l3cache-sram@100000 {30 gic500: interrupt-controller@1800000 {[all …]
1 // SPDX-License-Identifier: GPL-2.0-only OR MIT5 * Copyright (C) 2016-2024 Texas Instruments Incorporated - https://www.ti.com/7 #include <dt-bindings/phy/phy.h>8 #include <dt-bindings/phy/phy-ti.h>9 #include <dt-bindings/mux/mux.h>11 #include "k3-serdes.h"14 cmn_refclk: clock-cmnrefclk {15 #clock-cells = <0>;16 compatible = "fixed-clock";17 clock-frequency = <0>;[all …]
1 // SPDX-License-Identifier: GPL-2.0-only OR MIT5 * Copyright (C) 2023-2024 Texas Instruments Incorporated - https://www.ti.com/10 compatible = "mmio-sram";11 #address-cells = <1>;12 #size-cells = <1>;15 gic500: interrupt-controller@1800000 {16 compatible = "arm,gic-v3";17 #address-cells = <2>;18 #size-cells = <2>;20 #interrupt-cells = <3>;[all …]
1 // SPDX-License-Identifier: GPL-2.0-only OR MIT5 * Copyright (C) 2021-2024 Texas Instruments Incorporated - https://www.ti.com/8 #include <dt-bindings/phy/phy-cadence.h>9 #include <dt-bindings/phy/phy-ti.h>12 serdes_refclk: clock-cmnrefclk {13 #clock-cells = <0>;14 compatible = "fixed-clock";15 clock-frequency = <0>;21 compatible = "mmio-sram";23 #address-cells = <1>;[all …]
1 // SPDX-License-Identifier: GPL-2.0-only OR MIT5 * Copyright (C) 2020-2024 Texas Instruments Incorporated - https://www.ti.com/8 #include <dt-bindings/phy/phy-cadence.h>9 #include <dt-bindings/phy/phy-ti.h>12 serdes_refclk: clock-cmnrefclk {13 #clock-cells = <0>;14 compatible = "fixed-clock";15 clock-frequency = <0>;21 compatible = "mmio-sram";23 #address-cells = <1>;[all …]
1 // SPDX-License-Identifier: GPL-2.0-only OR MIT5 * Copyright (C) 2022-2024 Texas Instruments Incorporated - https://www.ti.com/8 #include <dt-bindings/mux/mux.h>9 #include <dt-bindings/phy/phy.h>10 #include <dt-bindings/phy/phy-ti.h>12 #include "k3-serdes.h"15 serdes_refclk: clock-serdes {16 #clock-cells = <0>;17 compatible = "fixed-clock";29 compatible = "mmio-sram";[all …]
5 ---------------------------------------------------21 W: *Web-page* with status/info23 B: URI for where to file *bugs*. A web-page with detailed bug28 patches to the given subsystem. This is either an in-tree file,29 or a URI. See Documentation/maintainer/maintainer-entry-profile.rst46 N: [^a-z]tegra all files whose path contains tegra64 ----------------83 3WARE SAS/SATA-RAID SCSI DRIVERS (3W-XXXX, 3W-9XXX, 3W-SAS)85 L: linux-[email protected]88 F: drivers/scsi/3w-*[all …]