| /linux-6.14.4/drivers/gpu/drm/msm/disp/dpu1/ |
| D | dpu_hw_cdm.h | 15 * struct dpu_hw_cdm_cfg : current configuration of CDM block
17 * @output_width: output ROI width of CDM block
18 * @output_height: output ROI height of CDM block
19 * @output_bit_depth: output bit-depth of CDM block
22 * @output_fmt: handle to msm_format of CDM block
23 * @csc_cfg: handle to CSC matrix programmed for CDM block
24 * @output_type: interface to which CDM is paired (HDMI/WB)
25 * @pp_id: ping-pong block to which CDM is bound to
41 * in the horizontal/vertical direction for the CDM block.
52 * CDM block can be paired with WB or HDMI block. These values match
[all …]
|
| D | dpu_hw_cdm.c | 38 /* CDM CDWN2 sub-block bit definitions */
46 /* CDM CSC10 sub-block bit definitions */
51 /* CDM HDMI pack sub-block bit definitions */
170 static int dpu_hw_cdm_enable(struct dpu_hw_cdm *ctx, struct dpu_hw_cdm_cfg *cdm) in dpu_hw_cdm_enable() argument
177 if (!ctx || !cdm) in dpu_hw_cdm_enable()
180 fmt = cdm->output_fmt; in dpu_hw_cdm_enable()
185 dpu_hw_csc_setup(&ctx->hw, CDM_CSC_10_MATRIX_COEFF_0, cdm->csc_cfg, true); in dpu_hw_cdm_enable()
186 dpu_hw_cdm_setup_cdwn(ctx, cdm); in dpu_hw_cdm_enable()
188 if (cdm->output_type == CDM_CDWN_OUTPUT_HDMI) { in dpu_hw_cdm_enable()
200 ctx->ops.bind_pingpong_blk(ctx, cdm->pp_id); in dpu_hw_cdm_enable()
[all …]
|
| D | dpu_hw_ctl.h | 42 * @cdm: CDM block used
52 enum dpu_cdm cdm; member
185 * @cdm_num: idx of cdm to be flushed
262 * @pending_cdm_flush_mask: pending CDM flush
|
| D | dpu_rm.h | 26 * @cdm_blk: cdm hardware resource
54 * @needs_cdm: indicates whether cdm block is needed for this display topology
|
| D | dpu_encoder_phys.h | 153 * @hw_cdm: Hardware interface to the CDM registers
155 * @cdm_cfg: CDM block config needed to store WB/DP block's CDM configuration
|
| D | dpu_rm.c | 195 if (cat->cdm) { in dpu_rm_init()
198 hw = dpu_hw_cdm_init(dev, cat->cdm, mmio, cat->mdss_ver); in dpu_rm_init()
201 DPU_ERROR("failed cdm object creation: err %d\n", rc); in dpu_rm_init()
582 /* try allocating only one CDM block */ in _dpu_rm_reserve_cdm()
584 DPU_ERROR("CDM block does not exist\n"); in _dpu_rm_reserve_cdm()
626 DPU_ERROR("unable to find CDM blk\n"); in _dpu_rm_make_reservation()
|
| /linux-6.14.4/arch/powerpc/include/asm/ |
| D | mpc52xx.h | 197 u32 jtag_id; /* CDM + 0x00 reg0 read only */
198 u32 rstcfg; /* CDM + 0x04 reg1 read only */
199 u32 breadcrumb; /* CDM + 0x08 reg2 */
201 u8 mem_clk_sel; /* CDM + 0x0c reg3 byte0 */
202 u8 xlb_clk_sel; /* CDM + 0x0d reg3 byte1 read only */
203 u8 ipb_clk_sel; /* CDM + 0x0e reg3 byte2 */
204 u8 pci_clk_sel; /* CDM + 0x0f reg3 byte3 */
206 u8 ext_48mhz_en; /* CDM + 0x10 reg4 byte0 */
207 u8 fd_enable; /* CDM + 0x11 reg4 byte1 */
208 u16 fd_counters; /* CDM + 0x12 reg4 byte2,3 */
[all …]
|
| /linux-6.14.4/arch/powerpc/platforms/52xx/ |
| D | lite5200_pm.c | 14 static struct mpc52xx_cdm __iomem *cdm; variable
77 cdm = mbar + 0x200; in lite5200_pm_prepare()
102 _memcpy_fromio(&scdm, cdm, sizeof(*cdm)); in lite5200_save_regs()
137 /* CDM - Clock Distribution Module */ in lite5200_restore_regs()
138 out_8(&cdm->ipb_clk_sel, scdm.ipb_clk_sel); in lite5200_restore_regs()
139 out_8(&cdm->pci_clk_sel, scdm.pci_clk_sel); in lite5200_restore_regs()
141 out_8(&cdm->ext_48mhz_en, scdm.ext_48mhz_en); in lite5200_restore_regs()
142 out_8(&cdm->fd_enable, scdm.fd_enable); in lite5200_restore_regs()
143 out_be16(&cdm->fd_counters, scdm.fd_counters); in lite5200_restore_regs()
145 out_be32(&cdm->clk_enables, scdm.clk_enables); in lite5200_restore_regs()
[all …]
|
| D | lite5200.c | 34 { .compatible = "fsl,mpc5200-cdm", },
35 { .compatible = "mpc5200-cdm", },
56 struct mpc52xx_cdm __iomem *cdm; in lite5200_fix_clock_config() local
59 cdm = of_iomap(np, 0); in lite5200_fix_clock_config()
61 if (!cdm) { in lite5200_fix_clock_config()
68 out_8(&cdm->ext_48mhz_en, 0x00); in lite5200_fix_clock_config()
69 out_8(&cdm->fd_enable, 0x01); in lite5200_fix_clock_config()
70 if (in_be32(&cdm->rstcfg) & 0x40) /* Assumes 33Mhz clock */ in lite5200_fix_clock_config()
71 out_be16(&cdm->fd_counters, 0x0001); in lite5200_fix_clock_config()
73 out_be16(&cdm->fd_counters, 0x5555); in lite5200_fix_clock_config()
[all …]
|
| D | mpc52xx_pm.c | 21 static struct mpc52xx_cdm __iomem *cdm; variable
90 cdm = mbar + 0x200; in mpc52xx_pm_prepare()
140 out_8(&cdm->ccs_sleep_enable, 1); in mpc52xx_pm_enter()
141 out_8(&cdm->osc_sleep_enable, 1); in mpc52xx_pm_enter()
142 out_8(&cdm->ccs_qreq_test, 1); in mpc52xx_pm_enter()
145 clk_enables = in_be32(&cdm->clk_enables); in mpc52xx_pm_enter()
146 out_be32(&cdm->clk_enables, clk_enables & 0x00088000); in mpc52xx_pm_enter()
162 mpc52xx_deep_sleep(sram, sdram, cdm, intr); in mpc52xx_pm_enter()
173 out_be32(&cdm->clk_enables, clk_enables); in mpc52xx_pm_enter()
174 out_8(&cdm->ccs_sleep_enable, 0); in mpc52xx_pm_enter()
[all …]
|
| D | mpc52xx_common.c | 115 { .compatible = "fsl,mpc5200-cdm", },
116 { .compatible = "mpc5200-cdm", }, /* old */
167 * mpc52xx_set_psc_clkdiv: Set clock divider in the CDM for PSC ports
170 * @clkdiv: clock divider value to put into CDM PSC register.
|
| D | mpc52xx_sleep.S | 10 mpc52xx_deep_sleep: /* args r3-r6: SRAM, SDRAM regs, CDM regs, INTR regs */
90 lwz r8, 0x14(r5) /* cdm->clkenable */
|
| D | Kconfig | 18 - CDM configuration (clocking) is setup correctly by firmware,
|
| D | mpc5200_simple.c | 14 * - CDM configuration (clocking) is setup correctly by firmware,
|
| /linux-6.14.4/drivers/spi/ |
| D | spi-ppc4xx.c | 101 * SCPClkOut = OPBCLK/(4(CDM + 1))
103 * CDM = (OPBCLK/4*SCPClkOut) - 1
106 u8 cdm; member
167 u8 cdm = 0; in spi_ppc4xx_setupxfer() local
194 cdm = min(scr, 0xff); in spi_ppc4xx_setupxfer()
196 dev_dbg(&spi->dev, "setting pre-scaler to %d (hz %d)\n", cdm, speed); in spi_ppc4xx_setupxfer()
198 if (in_8(&hw->regs->cdm) != cdm) in spi_ppc4xx_setupxfer()
199 out_8(&hw->regs->cdm, cdm); in spi_ppc4xx_setupxfer()
|
| /linux-6.14.4/Documentation/devicetree/bindings/pci/ |
| D | snps,dw-pcie-common.yaml | 24 configuration space belongs to the Configuration-Dependent Module (CDM)
28 CDM/ELBI (dbi_cs) and CS2 (dbi_cs2) signals (selector bits). Such
254 snps,enable-cdm-check:
257 Enable automatic checking of CDM (Configuration Dependent Module)
258 registers for data corruption. CDM registers include standard PCIe
|
| D | snps,dw-pcie-ep.yaml | 46 CDM/ELBI = 0 and CS2 = 0 or is a contiguous memory region
53 by setting CDM/ELBI = 0 and CS2 = 1. This is an intermix of
63 can be selected by setting CDM/ELBI = 1 and CS2 = 0 wires or can
70 Unit and Enhanced DMA, which is selected by setting CDM/ELBI = 1
|
| D | snps,dw-pcie.yaml | 55 CDM/ELBI = 0 and CS2 = 0 or is a contiguous memory region
62 by setting CDM/ELBI = 0 and CS2 = 1. This is an intermix of
72 can be selected by setting CDM/ELBI = 1 and CS2 = 0 wires or can
79 Unit and Enhanced DMA, which is selected by setting CDM/ELBI = 1
|
| /linux-6.14.4/drivers/net/can/mscan/ |
| D | mpc5xxx_can.c | 40 { .compatible = "fsl,mpc5200-cdm", },
48 struct mpc52xx_cdm __iomem *cdm; in mpc52xx_can_get_clock() local
81 cdm = of_iomap(np_cdm, 0); in mpc52xx_can_get_clock()
82 if (!cdm) { in mpc52xx_can_get_clock()
88 if (in_8(&cdm->ipb_clk_sel) & 0x1) in mpc52xx_can_get_clock()
90 val = in_be32(&cdm->rstcfg); in mpc52xx_can_get_clock()
96 iounmap(cdm); in mpc52xx_can_get_clock()
|
| /linux-6.14.4/drivers/gpu/drm/imagination/ |
| D | pvr_rogue_fwif_shared.h | 29 * This is a generic limit imposed on any DM (GEOMETRY,FRAGMENT,CDM,TDM,2D,TRANSFER)
182 /* CDM resume controls */
198 /* CDM registers for ctx switch */
|
| D | pvr_rogue_fwif_common.h | 43 /* Maximum number of DM in use: GP, 2D/TDM, GEOM, 3D, CDM, RAY, GEOM2, GEOM3, GEOM4 */
|
| /linux-6.14.4/arch/powerpc/boot/dts/ |
| D | mpc5200b.dtsi | 50 cdm@200 {
51 compatible = "fsl,mpc5200b-cdm","fsl,mpc5200-cdm";
|
| D | tqm5200.dts | 49 cdm@200 {
50 compatible = "fsl,mpc5200-cdm";
|
| D | charon.dts | 52 cdm@200 {
53 compatible = "fsl,mpc5200-cdm";
|
| /linux-6.14.4/drivers/gpu/drm/msm/disp/mdp5/ |
| D | mdp5_cfg.c | 714 .cdm = {
908 .cdm = {
999 .cdm = {
1085 .cdm = {
1188 .cdm = {
1286 .cdm = {
1384 .cdm = {
|