Searched +full:0 +full:x01c2bc00 (Results 1 – 5 of 5) sorted by relevance
65 reg = <0x01c2bc00 0x400>;74 reg = <0x01c2bc00 0x400>;
67 /* Registers address (physical base address 0x01C2BC00) */68 #define SUN4I_REG_MSEL_ADDR 0x0000 /* CAN Mode Select */69 #define SUN4I_REG_CMD_ADDR 0x0004 /* CAN Command */70 #define SUN4I_REG_STA_ADDR 0x0008 /* CAN Status */71 #define SUN4I_REG_INT_ADDR 0x000c /* CAN Interrupt Flag */72 #define SUN4I_REG_INTEN_ADDR 0x0010 /* CAN Interrupt Enable */73 #define SUN4I_REG_BTIME_ADDR 0x0014 /* CAN Bus Timing 0 */74 #define SUN4I_REG_TEWL_ADDR 0x0018 /* CAN Tx Error Warning Limit */75 #define SUN4I_REG_ERRC_ADDR 0x001c /* CAN Error Counter */76 #define SUN4I_REG_RMCNT_ADDR 0x0020 /* CAN Receive Message Counter */[all …]
111 #size-cells = <0>;112 cpu0: cpu@0 {115 reg = <0x0>;166 #clock-cells = <0>;173 #clock-cells = <0>;199 size = <0x6000000>;200 alloc-ranges = <0x40000000 0x10000000>;214 reg = <0x01c00000 0x30>;219 sram_a: sram@0 {221 reg = <0x00000000 0xc000>;[all …]
64 #clock-cells = <0>;72 #clock-cells = <0>;82 #size-cells = <0>;84 cpu0: cpu@0 {87 reg = <0>;130 polling-delay-passive = <0>;131 polling-delay = <0>;132 thermal-sensors = <&ths 0>;143 hysteresis = <0>;161 polling-delay-passive = <0>;[all …]
101 #size-cells = <0>;103 cpu0: cpu@0 {106 reg = <0>;181 size = <0x6000000>;182 alloc-ranges = <0x40000000 0x10000000>;208 #clock-cells = <0>;215 #clock-cells = <0>;231 #clock-cells = <0>;238 #clock-cells = <0>;245 #clock-cells = <0>;[all …]