xref: /aosp_15_r20/external/coreboot/src/soc/intel/xeon_sp/uncore_acpi_cxl.c (revision b9411a12aaaa7e1e6a6fb7c5e057f44ee179a49c)
1 /* SPDX-License-Identifier: GPL-2.0-or-later */
2 
3 #include <soc/acpi.h>
4 #include <soc/numa.h>
5 #include <soc/util.h>
6 
cxl_fill_srat(unsigned long current)7 unsigned long cxl_fill_srat(unsigned long current)
8 {
9 	/*
10 	 * Create Generic Initiator Affinity structure
11 	 * and Memory Affinity structure for CXL memory.
12 	 * In the pds (Proximity Domains structure), Generic Initiator domains
13 	 * are after processor domains.
14 	 */
15 	uint32_t base, size;
16 	for (uint8_t i = 0; i < pds.num_pds; i++) {
17 		if (pds.pds[i].pd_type != PD_TYPE_GENERIC_INITIATOR)
18 			continue;
19 		if (!pds.pds[i].dev)
20 			continue;
21 
22 		printk(BIOS_DEBUG, "adding srat GIA ID: %d, dev: %s\n", i, dev_path(pds.pds[i].dev));
23 		/* flags: 1 (enabled) */
24 		current += acpi_create_srat_gia_pci((acpi_srat_gia_t *)current, i, pds.pds[i].dev, 1);
25 		base = pds.pds[i].base << 16;
26 		size = pds.pds[i].size << 16;
27 		printk(BIOS_DEBUG,
28 		       "adding srat MEM affinity domain: %d, base: 0x%x, size: 0x%x\n", i, base,
29 		       size);
30 		current +=
31 			acpi_create_srat_mem((acpi_srat_mem_t *)current, i,
32 					     pds.pds[i].base << 16, pds.pds[i].size << 16, 1);
33 	}
34 
35 	return current;
36 }
37 
38 /*
39  * The current kernel does not use HMAT table.
40  */
acpi_fill_hmat(unsigned long current)41 unsigned long acpi_fill_hmat(unsigned long current)
42 {
43 	uint32_t pd_initiator = 0;
44 	uint32_t pd_memory = 0;
45 
46 	/* In CXL2.0, CXL memories attached to different sockets could be ganged
47 	 * to form a single CXL memory region.
48 	 * For now, we do not consider this case, and assume socket_bitmap has
49 	 * only one bit set, eg. a CXL memory region is attached to one socket.
50 	 */
51 	uint8_t j;
52 	for (uint8_t i = soc_get_num_cpus(); i < pds.num_pds; i++) {
53 		pd_memory = i;
54 		/* check socket_bitmap which is type uint8_t */
55 		for (j = 0; j < 8; j++)
56 			if ((pds.pds[i].socket_bitmap >> j) == 0)
57 				break;
58 		pd_initiator = j - 1;
59 		printk(BIOS_DEBUG, "HMAT: pd_initiator = %d, pd_memory = %d\n", pd_initiator,
60 		       pd_memory);
61 		current += acpi_create_hmat_mpda((acpi_hmat_mpda_t *)current, pd_initiator,
62 						 pd_memory);
63 	}
64 
65 	/*
66 	 * We created only MPDA structure. In future, we could create
67 	 * SLLBI structure to describe latency/bandwidth info when such info
68 	 * is available.
69 	 */
70 
71 	return current;
72 }
73