Searched refs:update_hardmin_optimized_params (Results 1 – 2 of 2) sorted by relevance
663 if (params->update_hardmin_optimized_params.response) in dcn401_execute_block_sequence()664 *params->update_hardmin_optimized_params.response = dcn401_set_hard_min_by_freq_optimized( in dcn401_execute_block_sequence()666 params->update_hardmin_optimized_params.ppclk, in dcn401_execute_block_sequence()667 params->update_hardmin_optimized_params.freq_khz); in dcn401_execute_block_sequence()670 params->update_hardmin_optimized_params.ppclk, in dcn401_execute_block_sequence()671 params->update_hardmin_optimized_params.freq_khz); in dcn401_execute_block_sequence()1136 block_sequence[num_steps].params.update_hardmin_optimized_params.ppclk = PPCLK_DISPCLK; in dcn401_build_update_display_clocks_sequence()1137 …block_sequence[num_steps].params.update_hardmin_optimized_params.freq_khz = clk_mgr_base->clks.dis… in dcn401_build_update_display_clocks_sequence()1138 …block_sequence[num_steps].params.update_hardmin_optimized_params.response = &clk_mgr_base->clks.ac… in dcn401_build_update_display_clocks_sequence()1159 block_sequence[num_steps].params.update_hardmin_optimized_params.ppclk = PPCLK_DPPCLK; in dcn401_build_update_display_clocks_sequence()[all …]
28 } update_hardmin_optimized_params; member