Searched refs:tile_mode_array (Results 1 – 13 of 13) sorted by relevance
494 value = rdev->config.cik.tile_mode_array; in radeon_info_ioctl()497 value = rdev->config.si.tile_mode_array; in radeon_info_ioctl()
1305 num_banks = (rdev->config.si.tile_mode_array[index] >> 20) & 0x3; in dce4_crtc_do_set_base()1346 u32 pipe_config = (rdev->config.cik.tile_mode_array[10] >> 6) & 0x1f; in dce4_crtc_do_set_base()
2149 uint32_t tile_mode_array[32]; member2180 uint32_t tile_mode_array[32]; member
2471 u32 *tile = rdev->config.si.tile_mode_array; in si_tiling_mode_table_init()2473 ARRAY_SIZE(rdev->config.si.tile_mode_array); in si_tiling_mode_table_init()
2322 u32 *tile = rdev->config.cik.tile_mode_array; in cik_tiling_mode_table_init()2325 ARRAY_SIZE(rdev->config.cik.tile_mode_array); in cik_tiling_mode_table_init()
217 uint32_t tile_mode_array[32]; member
388 const u32 num_tile_mode_states = ARRAY_SIZE(adev->gfx.config.tile_mode_array); in gfx_v6_0_tiling_mode_table_init()391 memset(adev->gfx.config.tile_mode_array, 0, sizeof(adev->gfx.config.tile_mode_array)); in gfx_v6_0_tiling_mode_table_init()392 tilemode = adev->gfx.config.tile_mode_array; in gfx_v6_0_tiling_mode_table_init()
3196 config->tile_config_ptr = adev->gfx.config.tile_mode_array; in amdgpu_amdkfd_get_tile_config()3198 ARRAY_SIZE(adev->gfx.config.tile_mode_array); in amdgpu_amdkfd_get_tile_config()
1193 return adev->gfx.config.tile_mode_array[idx]; in cik_get_register_value()
809 return adev->gfx.config.tile_mode_array[idx]; in vi_get_register_value()
1233 return adev->gfx.config.tile_mode_array[idx]; in si_get_register_value()
993 ARRAY_SIZE(adev->gfx.config.tile_mode_array); in gfx_v7_0_tiling_mode_table_init()999 tile = adev->gfx.config.tile_mode_array; in gfx_v7_0_tiling_mode_table_init()
2089 const u32 num_tile_mode_states = ARRAY_SIZE(adev->gfx.config.tile_mode_array); in gfx_v8_0_tiling_mode_table_init()2093 modearray = adev->gfx.config.tile_mode_array; in gfx_v8_0_tiling_mode_table_init()