Searched refs:reg_io_width (Results 1 – 8 of 8) sorted by relevance
45 u32 reg_io_width; in of_syscon_register() local77 ret = of_property_read_u32(np, "reg-io-width", ®_io_width); in of_syscon_register()79 reg_io_width = 4; in of_syscon_register()104 syscon_config.reg_stride = reg_io_width; in of_syscon_register()105 syscon_config.val_bits = reg_io_width * 8; in of_syscon_register()106 syscon_config.max_register = resource_size(&res) - reg_io_width; in of_syscon_register()
36 u32 reg_io_width; member571 &i2c->reg_io_width); in ocores_i2c_of_probe()622 i2c->reg_io_width = 1; in ocores_i2c_probe()628 i2c->reg_io_width = pdata->reg_io_width; in ocores_i2c_probe()640 if (i2c->reg_io_width == 0) in ocores_i2c_probe()641 i2c->reg_io_width = 1; /* Set to default value */ in ocores_i2c_probe()647 switch (i2c->reg_io_width) { in ocores_i2c_probe()665 i2c->reg_io_width); in ocores_i2c_probe()
206 u32 reg_io_width; in shmem_setup_iomap() local237 of_property_read_u32(shmem, "reg-io-width", ®_io_width); in shmem_setup_iomap()238 switch (reg_io_width) { in shmem_setup_iomap()
166 u32 reg_io_width; /* DR I/O width in bytes */ member217 switch (dws->reg_io_width) { in dw_read_io_reg()228 switch (dws->reg_io_width) { in dw_write_io_reg()
368 &dws->reg_io_width)) in dw_spi_mmio_probe()369 dws->reg_io_width = 4; in dw_spi_mmio_probe()
279 dws->reg_io_width = 4; in dw_spi_bt1_probe()
13 u32 reg_io_width; /* register io read/write width */ member
1005 .reg_io_width = 4, // 32-bit/4-byte