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Searched refs:reg_encode (Results 1 – 6 of 6) sorted by relevance

/linux-6.14.4/drivers/net/ipa/
Dipa_main.c306 val = reg_encode(reg, GEN_QMB_0_MAX_WRITES, data0->max_writes); in ipa_hardware_config_qsb()
308 val |= reg_encode(reg, GEN_QMB_1_MAX_WRITES, data1->max_writes); in ipa_hardware_config_qsb()
315 val = reg_encode(reg, GEN_QMB_0_MAX_READS, data0->max_reads); in ipa_hardware_config_qsb()
317 val |= reg_encode(reg, GEN_QMB_0_MAX_READS_BEATS, in ipa_hardware_config_qsb()
320 val = reg_encode(reg, GEN_QMB_1_MAX_READS, data1->max_reads); in ipa_hardware_config_qsb()
322 val |= reg_encode(reg, GEN_QMB_1_MAX_READS_BEATS, in ipa_hardware_config_qsb()
373 val = reg_encode(reg, DPL_TIMESTAMP_LSB, DPL_TIMESTAMP_SHIFT); in ipa_qtime_config()
377 val = reg_encode(reg, TAG_TIMESTAMP_LSB, TAG_TIMESTAMP_SHIFT); in ipa_qtime_config()
378 val = reg_encode(reg, NAT_TIMESTAMP_LSB, NAT_TIMESTAMP_SHIFT); in ipa_qtime_config()
384 val = reg_encode(reg, PULSE_GRAN_0, IPA_GRAN_100_US); in ipa_qtime_config()
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Dipa_endpoint.c664 val |= reg_encode(reg, CS_METADATA_HDR_OFFSET, off); in ipa_endpoint_init_cfg()
677 val |= reg_encode(reg, CS_OFFLOAD_EN, enabled); in ipa_endpoint_init_cfg()
694 val = reg_encode(reg, NAT_EN, IPA_NAT_TYPE_BYPASS); in ipa_endpoint_init_nat()
728 val = reg_encode(reg, HDR_LEN, header_size & field_max); in ipa_header_size_encode()
737 val |= reg_encode(reg, HDR_LEN_MSB, header_size); in ipa_header_size_encode()
750 val = reg_encode(reg, HDR_OFST_METADATA, offset); in ipa_metadata_offset_encode()
759 val |= reg_encode(reg, HDR_OFST_METADATA_MSB, offset); in ipa_metadata_offset_encode()
815 val |= reg_encode(reg, HDR_OFST_PKT_SIZE, off); in ipa_endpoint_init_hdr()
859 val |= reg_encode(reg, HDR_PAD_TO_ALIGNMENT, pad_align); in ipa_endpoint_init_hdr_ext()
873 val |= reg_encode(reg, HDR_OFST_PKT_SIZE_MSB, off); in ipa_endpoint_init_hdr_ext()
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Dipa_resource.c78 val = reg_encode(reg, X_MIN_LIM, xlimits->min); in ipa_resource_config_common()
79 val |= reg_encode(reg, X_MAX_LIM, xlimits->max); in ipa_resource_config_common()
81 val |= reg_encode(reg, Y_MIN_LIM, ylimits->min); in ipa_resource_config_common()
82 val |= reg_encode(reg, Y_MAX_LIM, ylimits->max); in ipa_resource_config_common()
Dgsi.c185 val = reg_encode(reg, CHTYPE_PROTOCOL, type); in ch_c_cntxt_0_type_encode()
191 return val | reg_encode(reg, CHTYPE_PROTOCOL_MSB, type); in ch_c_cntxt_0_type_encode()
421 val = reg_encode(reg, EV_CHID, evt_ring_id); in gsi_evt_ring_command()
422 val |= reg_encode(reg, EV_OPCODE, opcode); in gsi_evt_ring_command()
538 val = reg_encode(reg, CH_CHID, channel_id); in gsi_channel_command()
539 val |= reg_encode(reg, CH_OPCODE, opcode); in gsi_channel_command()
725 val = reg_encode(reg, EV_CHTYPE, GSI_CHANNEL_TYPE_GPI); in gsi_evt_ring_program()
728 val |= reg_encode(reg, EV_ELEMENT_SIZE, GSI_RING_ELEMENT_SIZE); in gsi_evt_ring_program()
732 val = reg_encode(reg, R_LENGTH, ring->count * GSI_RING_ELEMENT_SIZE); in gsi_evt_ring_program()
749 val = reg_encode(reg, EV_MODT, GSI_EVT_RING_INT_MODT); in gsi_evt_ring_program()
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Dreg.h102 static inline u32 reg_encode(const struct reg *reg, u32 field_id, u32 val) in reg_encode() function
Dipa_mem.c118 val = reg_encode(reg, IPA_BASE_ADDR, offset); in ipa_mem_setup()