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Searched refs:regRLC_SPM_PERFMON_RING_BASE_LO_BASE_IDX (Results 1 – 6 of 6) sorted by relevance

/linux-6.14.4/drivers/gpu/drm/amd/include/asic_reg/gc/
Dgc_9_4_2_offset.h4353 #define regRLC_SPM_PERFMON_RING_BASE_LO_BASE_IDX … macro
Dgc_9_4_3_offset.h6245 #define regRLC_SPM_PERFMON_RING_BASE_LO_BASE_IDX … macro
Dgc_11_5_0_offset.h8144 #define regRLC_SPM_PERFMON_RING_BASE_LO_BASE_IDX … macro
Dgc_12_0_0_offset.h5899 #define regRLC_SPM_PERFMON_RING_BASE_LO_BASE_IDX … macro
Dgc_11_0_0_offset.h9427 #define regRLC_SPM_PERFMON_RING_BASE_LO_BASE_IDX … macro
Dgc_11_0_3_offset.h9725 #define regRLC_SPM_PERFMON_RING_BASE_LO_BASE_IDX … macro