Home
last modified time | relevance | path

Searched refs:regOTG1_OTG_INTERRUPT_CONTROL_BASE_IDX (Results 1 – 8 of 8) sorted by relevance

/linux-6.14.4/drivers/gpu/drm/amd/include/asic_reg/dcn/
Ddcn_3_5_1_offset.h6838 #define regOTG1_OTG_INTERRUPT_CONTROL_BASE_IDX … macro
Ddcn_3_1_2_offset.h9058 #define regOTG1_OTG_INTERRUPT_CONTROL_BASE_IDX … macro
Ddcn_3_2_0_offset.h8206 #define regOTG1_OTG_INTERRUPT_CONTROL_BASE_IDX … macro
Ddcn_3_1_4_offset.h8111 #define regOTG1_OTG_INTERRUPT_CONTROL_BASE_IDX … macro
Ddcn_3_5_0_offset.h6859 #define regOTG1_OTG_INTERRUPT_CONTROL_BASE_IDX … macro
Ddcn_3_2_1_offset.h8205 #define regOTG1_OTG_INTERRUPT_CONTROL_BASE_IDX … macro
Ddcn_4_1_0_offset.h8862 #define regOTG1_OTG_INTERRUPT_CONTROL_BASE_IDX … macro
Ddcn_3_1_6_offset.h9282 #define regOTG1_OTG_INTERRUPT_CONTROL_BASE_IDX … macro