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Searched refs:regMPC_OUT1_CSC_C31_C32_B_BASE_IDX (Results 1 – 9 of 9) sorted by relevance

/linux-6.14.4/drivers/gpu/drm/amd/include/asic_reg/dcn/
Ddcn_3_1_5_offset.h7241 #define regMPC_OUT1_CSC_C31_C32_B_BASE_IDX … macro
Ddcn_3_5_1_offset.h13134 #define regMPC_OUT1_CSC_C31_C32_B_BASE_IDX … macro
Ddcn_3_1_2_offset.h7482 #define regMPC_OUT1_CSC_C31_C32_B_BASE_IDX … macro
Ddcn_3_2_0_offset.h6912 #define regMPC_OUT1_CSC_C31_C32_B_BASE_IDX … macro
Ddcn_3_1_4_offset.h14221 #define regMPC_OUT1_CSC_C31_C32_B_BASE_IDX … macro
Ddcn_3_5_0_offset.h13155 #define regMPC_OUT1_CSC_C31_C32_B_BASE_IDX … macro
Ddcn_3_2_1_offset.h6911 #define regMPC_OUT1_CSC_C31_C32_B_BASE_IDX … macro
Ddcn_4_1_0_offset.h7691 #define regMPC_OUT1_CSC_C31_C32_B_BASE_IDX … macro
Ddcn_3_1_6_offset.h7702 #define regMPC_OUT1_CSC_C31_C32_B_BASE_IDX … macro