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Searched refs:regMPCC_OGAM0_MPCC_OGAM_RAMA_END_CNTL1_R (Results 1 – 9 of 9) sorted by relevance

/linux-6.14.4/drivers/gpu/drm/amd/include/asic_reg/dcn/
Ddcn_3_1_5_offset.h6472 #define regMPCC_OGAM0_MPCC_OGAM_RAMA_END_CNTL1_R … macro
Ddcn_3_5_1_offset.h12293 #define regMPCC_OGAM0_MPCC_OGAM_RAMA_END_CNTL1_R … macro
Ddcn_3_1_2_offset.h6713 #define regMPCC_OGAM0_MPCC_OGAM_RAMA_END_CNTL1_R … macro
Ddcn_3_2_0_offset.h5015 #define regMPCC_OGAM0_MPCC_OGAM_RAMA_END_CNTL1_R … macro
Ddcn_3_1_4_offset.h13380 #define regMPCC_OGAM0_MPCC_OGAM_RAMA_END_CNTL1_R … macro
Ddcn_3_5_0_offset.h12314 #define regMPCC_OGAM0_MPCC_OGAM_RAMA_END_CNTL1_R … macro
Ddcn_3_2_1_offset.h5014 #define regMPCC_OGAM0_MPCC_OGAM_RAMA_END_CNTL1_R … macro
Ddcn_4_1_0_offset.h5554 #define regMPCC_OGAM0_MPCC_OGAM_RAMA_END_CNTL1_R … macro
Ddcn_3_1_6_offset.h6933 #define regMPCC_OGAM0_MPCC_OGAM_RAMA_END_CNTL1_R … macro