Home
last modified time | relevance | path

Searched refs:regMPCC_OGAM0_MPCC_OGAM_RAMA_END_CNTL1_B (Results 1 – 9 of 9) sorted by relevance

/linux-6.14.4/drivers/gpu/drm/amd/include/asic_reg/dcn/
Ddcn_3_1_5_offset.h6464 #define regMPCC_OGAM0_MPCC_OGAM_RAMA_END_CNTL1_B … macro
Ddcn_3_5_1_offset.h12285 #define regMPCC_OGAM0_MPCC_OGAM_RAMA_END_CNTL1_B … macro
Ddcn_3_1_2_offset.h6705 #define regMPCC_OGAM0_MPCC_OGAM_RAMA_END_CNTL1_B … macro
Ddcn_3_2_0_offset.h5007 #define regMPCC_OGAM0_MPCC_OGAM_RAMA_END_CNTL1_B … macro
Ddcn_3_1_4_offset.h13372 #define regMPCC_OGAM0_MPCC_OGAM_RAMA_END_CNTL1_B … macro
Ddcn_3_5_0_offset.h12306 #define regMPCC_OGAM0_MPCC_OGAM_RAMA_END_CNTL1_B … macro
Ddcn_3_2_1_offset.h5006 #define regMPCC_OGAM0_MPCC_OGAM_RAMA_END_CNTL1_B … macro
Ddcn_4_1_0_offset.h5546 #define regMPCC_OGAM0_MPCC_OGAM_RAMA_END_CNTL1_B … macro
Ddcn_3_1_6_offset.h6925 #define regMPCC_OGAM0_MPCC_OGAM_RAMA_END_CNTL1_B … macro