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Searched refs:regDWB_OGAM_RAMA_END_CNTL1_B_BASE_IDX (Results 1 – 9 of 9) sorted by relevance

/linux-6.14.4/drivers/gpu/drm/amd/include/asic_reg/dcn/
Ddcn_3_1_5_offset.h907 #define regDWB_OGAM_RAMA_END_CNTL1_B_BASE_IDX … macro
Ddcn_3_5_1_offset.h11112 #define regDWB_OGAM_RAMA_END_CNTL1_B_BASE_IDX … macro
Ddcn_3_1_2_offset.h1204 #define regDWB_OGAM_RAMA_END_CNTL1_B_BASE_IDX … macro
Ddcn_3_2_0_offset.h811 #define regDWB_OGAM_RAMA_END_CNTL1_B_BASE_IDX … macro
Ddcn_3_1_4_offset.h12237 #define regDWB_OGAM_RAMA_END_CNTL1_B_BASE_IDX … macro
Ddcn_3_5_0_offset.h11133 #define regDWB_OGAM_RAMA_END_CNTL1_B_BASE_IDX … macro
Ddcn_3_2_1_offset.h811 #define regDWB_OGAM_RAMA_END_CNTL1_B_BASE_IDX … macro
Ddcn_4_1_0_offset.h940 #define regDWB_OGAM_RAMA_END_CNTL1_B_BASE_IDX … macro
Ddcn_3_1_6_offset.h1408 #define regDWB_OGAM_RAMA_END_CNTL1_B_BASE_IDX … macro