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Searched refs:regDTBCLK_DTO3_PHASE_BASE_IDX (Results 1 – 8 of 8) sorted by relevance

/linux-6.14.4/drivers/gpu/drm/amd/include/asic_reg/dcn/
Ddcn_3_1_5_offset.h207 #define regDTBCLK_DTO3_PHASE_BASE_IDX macro
Ddcn_3_5_1_offset.h1348 #define regDTBCLK_DTO3_PHASE_BASE_IDX macro
Ddcn_3_1_2_offset.h418 #define regDTBCLK_DTO3_PHASE_BASE_IDX macro
Ddcn_3_2_0_offset.h213 #define regDTBCLK_DTO3_PHASE_BASE_IDX macro
Ddcn_3_1_4_offset.h1510 #define regDTBCLK_DTO3_PHASE_BASE_IDX macro
Ddcn_3_5_0_offset.h1369 #define regDTBCLK_DTO3_PHASE_BASE_IDX macro
Ddcn_3_2_1_offset.h213 #define regDTBCLK_DTO3_PHASE_BASE_IDX macro
Ddcn_3_1_6_offset.h620 #define regDTBCLK_DTO3_PHASE_BASE_IDX macro