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Searched refs:regDTBCLK_DTO2_PHASE_BASE_IDX (Results 1 – 8 of 8) sorted by relevance

/linux-6.14.4/drivers/gpu/drm/amd/include/asic_reg/dcn/
Ddcn_3_1_5_offset.h205 #define regDTBCLK_DTO2_PHASE_BASE_IDX macro
Ddcn_3_5_1_offset.h1346 #define regDTBCLK_DTO2_PHASE_BASE_IDX macro
Ddcn_3_1_2_offset.h416 #define regDTBCLK_DTO2_PHASE_BASE_IDX macro
Ddcn_3_2_0_offset.h211 #define regDTBCLK_DTO2_PHASE_BASE_IDX macro
Ddcn_3_1_4_offset.h1508 #define regDTBCLK_DTO2_PHASE_BASE_IDX macro
Ddcn_3_5_0_offset.h1367 #define regDTBCLK_DTO2_PHASE_BASE_IDX macro
Ddcn_3_2_1_offset.h211 #define regDTBCLK_DTO2_PHASE_BASE_IDX macro
Ddcn_3_1_6_offset.h618 #define regDTBCLK_DTO2_PHASE_BASE_IDX macro