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Searched refs:regDPP_TOP0_DPP_CONTROL_BASE_IDX (Results 1 – 9 of 9) sorted by relevance

/linux-6.14.4/drivers/gpu/drm/amd/include/asic_reg/dcn/
Ddcn_3_1_5_offset.h4103 #define regDPP_TOP0_DPP_CONTROL_BASE_IDX … macro
Ddcn_3_5_1_offset.h4403 #define regDPP_TOP0_DPP_CONTROL_BASE_IDX … macro
Ddcn_3_1_2_offset.h4344 #define regDPP_TOP0_DPP_CONTROL_BASE_IDX … macro
Ddcn_3_2_0_offset.h3590 #define regDPP_TOP0_DPP_CONTROL_BASE_IDX … macro
Ddcn_3_1_4_offset.h4583 #define regDPP_TOP0_DPP_CONTROL_BASE_IDX … macro
Ddcn_3_5_0_offset.h4424 #define regDPP_TOP0_DPP_CONTROL_BASE_IDX … macro
Ddcn_3_2_1_offset.h3589 #define regDPP_TOP0_DPP_CONTROL_BASE_IDX … macro
Ddcn_4_1_0_offset.h3755 #define regDPP_TOP0_DPP_CONTROL_BASE_IDX … macro
Ddcn_3_1_6_offset.h4564 #define regDPP_TOP0_DPP_CONTROL_BASE_IDX … macro