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Searched refs:regDC_GPIO_DDC3_MASK_BASE_IDX (Results 1 – 13 of 13) sorted by relevance

/linux-6.14.4/drivers/gpu/drm/amd/include/asic_reg/dpcs/
Ddpcs_3_1_4_offset.h6297 #define regDC_GPIO_DDC3_MASK_BASE_IDX macro
Ddpcs_4_2_3_offset.h670 #define regDC_GPIO_DDC3_MASK_BASE_IDX macro
Ddpcs_4_2_0_offset.h637 #define regDC_GPIO_DDC3_MASK_BASE_IDX macro
Ddpcs_4_2_2_offset.h634 #define regDC_GPIO_DDC3_MASK_BASE_IDX macro
/linux-6.14.4/drivers/gpu/drm/amd/include/asic_reg/dcn/
Ddcn_3_1_5_offset.h11591 #define regDC_GPIO_DDC3_MASK_BASE_IDX macro
Ddcn_3_5_1_offset.h9823 #define regDC_GPIO_DDC3_MASK_BASE_IDX macro
Ddcn_3_1_2_offset.h11846 #define regDC_GPIO_DDC3_MASK_BASE_IDX macro
Ddcn_3_2_0_offset.h10996 #define regDC_GPIO_DDC3_MASK_BASE_IDX macro
Ddcn_3_1_4_offset.h10955 #define regDC_GPIO_DDC3_MASK_BASE_IDX macro
Ddcn_3_5_0_offset.h9844 #define regDC_GPIO_DDC3_MASK_BASE_IDX macro
Ddcn_3_2_1_offset.h11005 #define regDC_GPIO_DDC3_MASK_BASE_IDX macro
Ddcn_4_1_0_offset.h11260 #define regDC_GPIO_DDC3_MASK_BASE_IDX macro
Ddcn_3_1_6_offset.h12082 #define regDC_GPIO_DDC3_MASK_BASE_IDX macro