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Searched refs:regABM1_BL1_PWM_GRP2_REG_LOCK_BASE_IDX (Results 1 – 9 of 9) sorted by relevance

/linux-6.14.4/drivers/gpu/drm/amd/include/asic_reg/dcn/
Ddcn_3_1_5_offset.h7709 #define regABM1_BL1_PWM_GRP2_REG_LOCK_BASE_IDX macro
Ddcn_3_5_1_offset.h13475 #define regABM1_BL1_PWM_GRP2_REG_LOCK_BASE_IDX macro
Ddcn_3_1_2_offset.h7946 #define regABM1_BL1_PWM_GRP2_REG_LOCK_BASE_IDX macro
Ddcn_3_2_0_offset.h7112 #define regABM1_BL1_PWM_GRP2_REG_LOCK_BASE_IDX macro
Ddcn_3_1_4_offset.h14823 #define regABM1_BL1_PWM_GRP2_REG_LOCK_BASE_IDX macro
Ddcn_3_5_0_offset.h13496 #define regABM1_BL1_PWM_GRP2_REG_LOCK_BASE_IDX macro
Ddcn_3_2_1_offset.h7111 #define regABM1_BL1_PWM_GRP2_REG_LOCK_BASE_IDX macro
Ddcn_4_1_0_offset.h7852 #define regABM1_BL1_PWM_GRP2_REG_LOCK_BASE_IDX macro
Ddcn_3_1_6_offset.h8170 #define regABM1_BL1_PWM_GRP2_REG_LOCK_BASE_IDX macro