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Searched refs:mmDC_I2C_INTERRUPT_CONTROL_BASE_IDX (Results 1 – 9 of 9) sorted by relevance

/linux-6.14.4/drivers/gpu/drm/amd/include/asic_reg/dcn/
Ddcn_2_0_1_offset.h5116 #define mmDC_I2C_INTERRUPT_CONTROL_BASE_IDX … macro
Ddcn_3_0_3_offset.h4564 #define mmDC_I2C_INTERRUPT_CONTROL_BASE_IDX … macro
Ddcn_3_0_1_offset.h7405 #define mmDC_I2C_INTERRUPT_CONTROL_BASE_IDX … macro
Ddcn_1_0_offset.h7672 #define mmDC_I2C_INTERRUPT_CONTROL_BASE_IDX … macro
Ddcn_2_1_0_offset.h9266 #define mmDC_I2C_INTERRUPT_CONTROL_BASE_IDX … macro
Ddcn_3_0_2_offset.h8972 #define mmDC_I2C_INTERRUPT_CONTROL_BASE_IDX … macro
Ddcn_2_0_0_offset.h10297 #define mmDC_I2C_INTERRUPT_CONTROL_BASE_IDX … macro
Ddcn_3_0_0_offset.h10054 #define mmDC_I2C_INTERRUPT_CONTROL_BASE_IDX … macro
/linux-6.14.4/drivers/gpu/drm/amd/include/asic_reg/dce/
Ddce_12_0_offset.h1641 #define mmDC_I2C_INTERRUPT_CONTROL_BASE_IDX … macro