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Searched refs:mmDCCG_AUDIO_DTO0_PHASE_BASE_IDX (Results 1 – 9 of 9) sorted by relevance

/linux-6.14.4/drivers/gpu/drm/amd/include/asic_reg/dcn/
Ddcn_2_0_1_offset.h127 #define mmDCCG_AUDIO_DTO0_PHASE_BASE_IDX … macro
Ddcn_3_0_3_offset.h214 #define mmDCCG_AUDIO_DTO0_PHASE_BASE_IDX … macro
Ddcn_3_0_1_offset.h327 #define mmDCCG_AUDIO_DTO0_PHASE_BASE_IDX … macro
Ddcn_1_0_offset.h645 #define mmDCCG_AUDIO_DTO0_PHASE_BASE_IDX … macro
Ddcn_2_1_0_offset.h283 #define mmDCCG_AUDIO_DTO0_PHASE_BASE_IDX … macro
Ddcn_3_0_2_offset.h277 #define mmDCCG_AUDIO_DTO0_PHASE_BASE_IDX … macro
Ddcn_2_0_0_offset.h293 #define mmDCCG_AUDIO_DTO0_PHASE_BASE_IDX … macro
Ddcn_3_0_0_offset.h275 #define mmDCCG_AUDIO_DTO0_PHASE_BASE_IDX … macro
/linux-6.14.4/drivers/gpu/drm/amd/include/asic_reg/dce/
Ddce_12_0_offset.h843 #define mmDCCG_AUDIO_DTO0_PHASE_BASE_IDX … macro