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Searched refs:mmCNVC_CFG5_FORMAT_CONTROL_BASE_IDX (Results 1 – 2 of 2) sorted by relevance

/linux-6.14.4/drivers/gpu/drm/amd/include/asic_reg/dcn/
Ddcn_2_0_0_offset.h15493 #define mmCNVC_CFG5_FORMAT_CONTROL_BASE_IDX … macro
Ddcn_3_0_0_offset.h7336 #define mmCNVC_CFG5_FORMAT_CONTROL_BASE_IDX … macro