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Searched refs:logical_mask (Results 1 – 19 of 19) sorted by relevance

/linux-6.14.4/drivers/gpu/drm/xe/
Dxe_exec_queue.c52 u32 logical_mask, in __xe_exec_queue_alloc() argument
74 q->logical_mask = logical_mask; in __xe_exec_queue_alloc()
149 u32 logical_mask, u16 width, in xe_exec_queue_create() argument
156 q = __xe_exec_queue_alloc(xe, vm, logical_mask, width, hwe, flags, in xe_exec_queue_create()
179 u32 logical_mask = 0; in xe_exec_queue_create_class() local
186 logical_mask |= BIT(hwe->logical_instance); in xe_exec_queue_create_class()
192 if (!logical_mask) in xe_exec_queue_create_class()
195 return xe_exec_queue_create(xe, vm, logical_mask, 1, hwe0, flags, extensions); in xe_exec_queue_create_class()
551 u32 logical_mask; in xe_exec_queue_create_ioctl() local
602 logical_mask = calc_validate_logical_mask(xe, gt, eci, in xe_exec_queue_create_ioctl()
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Dxe_trace.h91 __field(u32, logical_mask)
102 __entry->logical_mask = q->logical_mask;
111 __get_str(dev), __entry->class, __entry->logical_mask,
Dxe_guc_submit_types.h81 u32 logical_mask; member
Dxe_exec_queue_types.h61 u32 logical_mask; member
Dxe_exec_queue.h18 u32 logical_mask, u16 width,
Dxe_migrate.c370 u32 logical_mask = 0; in xe_migrate_usm_logical_mask() local
379 logical_mask |= BIT(hwe->logical_instance); in xe_migrate_usm_logical_mask()
382 return logical_mask; in xe_migrate_usm_logical_mask()
429 u32 logical_mask = xe_migrate_usm_logical_mask(primary_gt); in xe_migrate_init() local
431 if (!hwe || !logical_mask) in xe_migrate_init()
438 m->q = xe_exec_queue_create(xe, vm, logical_mask, 1, hwe, in xe_migrate_init()
Dxe_guc_submit.c519 info.engine_submit_mask = q->logical_mask; in register_exec_queue()
1989 xe_hw_engine_class_to_str(q->class), q->logical_mask, guc_id); in xe_guc_exec_queue_reset_handler()
2060 xe_hw_engine_class_to_str(q->class), q->logical_mask, guc_id); in xe_guc_exec_queue_memory_cat_error_handler()
2167 snapshot->logical_mask = q->logical_mask; in xe_guc_exec_queue_snapshot_capture()
2257 drm_printf(p, "\tLogical mask: 0x%x\n", snapshot->logical_mask); in xe_guc_exec_queue_snapshot_print()
Dxe_devcoredump.c276 u32 adj_logical_mask = q->logical_mask; in devcoredump_snapshot()
Dxe_execlist.c372 xe_exec_queue_assign_name(q, ffs(q->logical_mask) - 1); in execlist_exec_queue_init()
Dxe_guc_capture.c1918 u32 adj_logical_mask = q->logical_mask; in xe_engine_snapshot_capture_for_queue()
/linux-6.14.4/drivers/gpu/drm/i915/gt/uc/
Dselftest_guc_multi_lrc.c20 if (engines[j]->logical_mask & BIT(i)) { in logical_sort()
Dintel_guc_ads.c244 info_map_write(info_map, mapping_table[guc_class][ilog2(engine->logical_mask)], in guc_mapping_table_init()
1062 engine_usage.engines[guc_class][ilog2(engine->logical_mask)]); in intel_guc_engine_usage_record_map()
Dintel_guc_submission.c2818 desc->engine_submit_mask = engine->logical_mask; in prepare_context_registration_info_v69()
2885 info->engine_submit_mask = engine->logical_mask; in prepare_context_registration_info_v70()
5947 ve->base.logical_mask |= sibling->logical_mask; in guc_create_virtual()
Dintel_guc_capture.c1402 (eng)->logical_mask); \
/linux-6.14.4/drivers/gpu/drm/i915/gt/
Dintel_engine_types.h384 intel_engine_mask_t logical_mask; member
Dintel_execlists_submission.c4019 ve->base.logical_mask |= sibling->logical_mask; in execlists_create_virtual()
Dintel_engine_cs.c497 engine->logical_mask = BIT(logical_instance); in intel_engine_setup()
/linux-6.14.4/drivers/gpu/drm/i915/
Di915_query.c163 info.logical_instance = ilog2(engine->logical_mask); in query_engine_info()
/linux-6.14.4/drivers/gpu/drm/i915/gem/
Di915_gem_context.c700 current_mask |= siblings[n]->logical_mask; in set_proto_ctx_engines_parallel_submit()