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Searched refs:TA_CS_BC_BASE_ADDR_HI__ADDRESS__SHIFT (Results 1 – 13 of 13) sorted by relevance

/linux-6.14.4/drivers/gpu/drm/amd/include/asic_reg/gca/
Dgfx_6_0_sh_mask.h10459 #define TA_CS_BC_BASE_ADDR_HI__ADDRESS__SHIFT 0x00000000 macro
Dgfx_7_2_sh_mask.h13948 #define TA_CS_BC_BASE_ADDR_HI__ADDRESS__SHIFT 0x0 macro
Dgfx_8_0_sh_mask.h15830 #define TA_CS_BC_BASE_ADDR_HI__ADDRESS__SHIFT 0x0 macro
Dgfx_8_1_sh_mask.h16410 #define TA_CS_BC_BASE_ADDR_HI__ADDRESS__SHIFT 0x0 macro
/linux-6.14.4/drivers/gpu/drm/amd/include/asic_reg/gc/
Dgc_9_0_sh_mask.h20161 #define TA_CS_BC_BASE_ADDR_HI__ADDRESS__SHIFT … macro
Dgc_9_2_1_sh_mask.h21398 #define TA_CS_BC_BASE_ADDR_HI__ADDRESS__SHIFT … macro
Dgc_9_1_sh_mask.h21468 #define TA_CS_BC_BASE_ADDR_HI__ADDRESS__SHIFT … macro
Dgc_11_5_0_sh_mask.h23464 #define TA_CS_BC_BASE_ADDR_HI__ADDRESS__SHIFT … macro
Dgc_11_0_0_sh_mask.h27426 #define TA_CS_BC_BASE_ADDR_HI__ADDRESS__SHIFT … macro
Dgc_12_0_0_sh_mask.h33756 #define TA_CS_BC_BASE_ADDR_HI__ADDRESS__SHIFT … macro
Dgc_11_0_3_sh_mask.h29949 #define TA_CS_BC_BASE_ADDR_HI__ADDRESS__SHIFT … macro
Dgc_10_1_0_sh_mask.h28091 #define TA_CS_BC_BASE_ADDR_HI__ADDRESS__SHIFT … macro
Dgc_10_3_0_sh_mask.h26363 #define TA_CS_BC_BASE_ADDR_HI__ADDRESS__SHIFT … macro