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Searched refs:SDMA1_STATUS1_REG__CE_WR_IDLE_MASK (Results 1 – 13 of 13) sorted by relevance

/linux-6.14.4/drivers/gpu/drm/amd/include/asic_reg/sdma1/
Dsdma1_4_0_sh_mask.h553 #define SDMA1_STATUS1_REG__CE_WR_IDLE_MASK 0x00000002L macro
Dsdma1_4_2_sh_mask.h551 #define SDMA1_STATUS1_REG__CE_WR_IDLE_MASK … macro
Dsdma1_4_2_2_sh_mask.h555 #define SDMA1_STATUS1_REG__CE_WR_IDLE_MASK … macro
/linux-6.14.4/drivers/gpu/drm/amd/include/asic_reg/oss/
Doss_2_4_sh_mask.h1647 #define SDMA1_STATUS1_REG__CE_WR_IDLE_MASK 0x2 macro
Doss_2_0_sh_mask.h1483 #define SDMA1_STATUS1_REG__CE_WR_IDLE_MASK 0x2 macro
Doss_3_0_1_sh_mask.h2165 #define SDMA1_STATUS1_REG__CE_WR_IDLE_MASK 0x2 macro
Doss_3_0_sh_mask.h2469 #define SDMA1_STATUS1_REG__CE_WR_IDLE_MASK 0x2 macro
/linux-6.14.4/drivers/gpu/drm/amd/include/asic_reg/sdma/
Dsdma_4_4_0_sh_mask.h3058 #define SDMA1_STATUS1_REG__CE_WR_IDLE_MASK … macro
/linux-6.14.4/drivers/gpu/drm/amd/include/asic_reg/gc/
Dgc_11_0_0_sh_mask.h2767 #define SDMA1_STATUS1_REG__CE_WR_IDLE_MASK … macro
Dgc_12_0_0_sh_mask.h3130 #define SDMA1_STATUS1_REG__CE_WR_IDLE_MASK … macro
Dgc_11_0_3_sh_mask.h2843 #define SDMA1_STATUS1_REG__CE_WR_IDLE_MASK … macro
Dgc_10_1_0_sh_mask.h3033 #define SDMA1_STATUS1_REG__CE_WR_IDLE_MASK … macro
Dgc_10_3_0_sh_mask.h3142 #define SDMA1_STATUS1_REG__CE_WR_IDLE_MASK … macro