Home
last modified time | relevance | path

Searched refs:MASTER_COMM_CNTL_REG__MASTER_COMM_INTERRUPT__SHIFT (Results 1 – 17 of 17) sorted by relevance

/linux-6.14.4/drivers/gpu/drm/amd/include/asic_reg/dce/
Ddce_6_0_sh_mask.h7674 #define MASTER_COMM_CNTL_REG__MASTER_COMM_INTERRUPT__SHIFT 0x00000000 macro
Ddce_8_0_sh_mask.h8154 #define MASTER_COMM_CNTL_REG__MASTER_COMM_INTERRUPT__SHIFT 0x0 macro
Ddce_10_0_sh_mask.h7218 #define MASTER_COMM_CNTL_REG__MASTER_COMM_INTERRUPT__SHIFT 0x0 macro
Ddce_11_0_sh_mask.h7108 #define MASTER_COMM_CNTL_REG__MASTER_COMM_INTERRUPT__SHIFT 0x0 macro
Ddce_11_2_sh_mask.h8220 #define MASTER_COMM_CNTL_REG__MASTER_COMM_INTERRUPT__SHIFT 0x0 macro
Ddce_12_0_sh_mask.h5119 #define MASTER_COMM_CNTL_REG__MASTER_COMM_INTERRUPT__SHIFT … macro
/linux-6.14.4/drivers/gpu/drm/amd/include/asic_reg/dcn/
Ddcn_3_0_3_sh_mask.h1750 #define MASTER_COMM_CNTL_REG__MASTER_COMM_INTERRUPT__SHIFT … macro
Ddcn_2_1_0_sh_mask.h2644 #define MASTER_COMM_CNTL_REG__MASTER_COMM_INTERRUPT__SHIFT … macro
Ddcn_1_0_sh_mask.h4138 #define MASTER_COMM_CNTL_REG__MASTER_COMM_INTERRUPT__SHIFT … macro
Ddcn_3_0_1_sh_mask.h2845 #define MASTER_COMM_CNTL_REG__MASTER_COMM_INTERRUPT__SHIFT … macro
Ddcn_3_1_5_sh_mask.h1696 #define MASTER_COMM_CNTL_REG__MASTER_COMM_INTERRUPT__SHIFT … macro
Ddcn_3_1_2_sh_mask.h2341 #define MASTER_COMM_CNTL_REG__MASTER_COMM_INTERRUPT__SHIFT … macro
Ddcn_3_1_6_sh_mask.h2906 #define MASTER_COMM_CNTL_REG__MASTER_COMM_INTERRUPT__SHIFT … macro
Ddcn_3_0_2_sh_mask.h2805 #define MASTER_COMM_CNTL_REG__MASTER_COMM_INTERRUPT__SHIFT … macro
Ddcn_3_1_4_sh_mask.h10959 #define MASTER_COMM_CNTL_REG__MASTER_COMM_INTERRUPT__SHIFT … macro
Ddcn_2_0_0_sh_mask.h2912 #define MASTER_COMM_CNTL_REG__MASTER_COMM_INTERRUPT__SHIFT … macro
Ddcn_3_0_0_sh_mask.h2907 #define MASTER_COMM_CNTL_REG__MASTER_COMM_INTERRUPT__SHIFT … macro