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Searched refs:DPP_TOP2_DPP_CONTROL__DPP_CLOCK_ENABLE__SHIFT (Results 1 – 16 of 16) sorted by relevance

/linux-6.14.4/drivers/gpu/drm/amd/include/asic_reg/dcn/
Ddcn_2_0_1_sh_mask.h7359 #define DPP_TOP2_DPP_CONTROL__DPP_CLOCK_ENABLE__SHIFT … macro
Ddcn_2_1_0_sh_mask.h16454 #define DPP_TOP2_DPP_CONTROL__DPP_CLOCK_ENABLE__SHIFT … macro
Ddcn_1_0_sh_mask.h15734 #define DPP_TOP2_DPP_CONTROL__DPP_CLOCK_ENABLE__SHIFT … macro
Ddcn_3_0_1_sh_mask.h17190 #define DPP_TOP2_DPP_CONTROL__DPP_CLOCK_ENABLE__SHIFT … macro
Ddcn_3_2_1_sh_mask.h13827 #define DPP_TOP2_DPP_CONTROL__DPP_CLOCK_ENABLE__SHIFT … macro
Ddcn_3_5_0_sh_mask.h17750 #define DPP_TOP2_DPP_CONTROL__DPP_CLOCK_ENABLE__SHIFT … macro
Ddcn_3_1_5_sh_mask.h18135 #define DPP_TOP2_DPP_CONTROL__DPP_CLOCK_ENABLE__SHIFT … macro
Ddcn_3_5_1_sh_mask.h17729 #define DPP_TOP2_DPP_CONTROL__DPP_CLOCK_ENABLE__SHIFT … macro
Ddcn_3_1_2_sh_mask.h20124 #define DPP_TOP2_DPP_CONTROL__DPP_CLOCK_ENABLE__SHIFT … macro
Ddcn_3_1_6_sh_mask.h20876 #define DPP_TOP2_DPP_CONTROL__DPP_CLOCK_ENABLE__SHIFT … macro
Ddcn_3_0_2_sh_mask.h18037 #define DPP_TOP2_DPP_CONTROL__DPP_CLOCK_ENABLE__SHIFT … macro
Ddcn_3_1_4_sh_mask.h25422 #define DPP_TOP2_DPP_CONTROL__DPP_CLOCK_ENABLE__SHIFT … macro
Ddcn_2_0_0_sh_mask.h19522 #define DPP_TOP2_DPP_CONTROL__DPP_CLOCK_ENABLE__SHIFT … macro
Ddcn_3_0_0_sh_mask.h19100 #define DPP_TOP2_DPP_CONTROL__DPP_CLOCK_ENABLE__SHIFT … macro
Ddcn_4_1_0_sh_mask.h15451 #define DPP_TOP2_DPP_CONTROL__DPP_CLOCK_ENABLE__SHIFT … macro
Ddcn_3_2_0_sh_mask.h13843 #define DPP_TOP2_DPP_CONTROL__DPP_CLOCK_ENABLE__SHIFT … macro