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Searched refs:DPP_TOP2_DPP_CONTROL__DPP_CLOCK_ENABLE_MASK (Results 1 – 16 of 16) sorted by relevance

/linux-6.14.4/drivers/gpu/drm/amd/include/asic_reg/dcn/
Ddcn_2_0_1_sh_mask.h7367 #define DPP_TOP2_DPP_CONTROL__DPP_CLOCK_ENABLE_MASK … macro
Ddcn_2_1_0_sh_mask.h16463 #define DPP_TOP2_DPP_CONTROL__DPP_CLOCK_ENABLE_MASK … macro
Ddcn_1_0_sh_mask.h15743 #define DPP_TOP2_DPP_CONTROL__DPP_CLOCK_ENABLE_MASK … macro
Ddcn_3_0_1_sh_mask.h17198 #define DPP_TOP2_DPP_CONTROL__DPP_CLOCK_ENABLE_MASK … macro
Ddcn_3_2_1_sh_mask.h13836 #define DPP_TOP2_DPP_CONTROL__DPP_CLOCK_ENABLE_MASK … macro
Ddcn_3_5_0_sh_mask.h17758 #define DPP_TOP2_DPP_CONTROL__DPP_CLOCK_ENABLE_MASK … macro
Ddcn_3_1_5_sh_mask.h18143 #define DPP_TOP2_DPP_CONTROL__DPP_CLOCK_ENABLE_MASK … macro
Ddcn_3_5_1_sh_mask.h17737 #define DPP_TOP2_DPP_CONTROL__DPP_CLOCK_ENABLE_MASK … macro
Ddcn_3_1_2_sh_mask.h20132 #define DPP_TOP2_DPP_CONTROL__DPP_CLOCK_ENABLE_MASK … macro
Ddcn_3_1_6_sh_mask.h20884 #define DPP_TOP2_DPP_CONTROL__DPP_CLOCK_ENABLE_MASK … macro
Ddcn_3_0_2_sh_mask.h18045 #define DPP_TOP2_DPP_CONTROL__DPP_CLOCK_ENABLE_MASK … macro
Ddcn_3_1_4_sh_mask.h25430 #define DPP_TOP2_DPP_CONTROL__DPP_CLOCK_ENABLE_MASK … macro
Ddcn_2_0_0_sh_mask.h19531 #define DPP_TOP2_DPP_CONTROL__DPP_CLOCK_ENABLE_MASK … macro
Ddcn_3_0_0_sh_mask.h19108 #define DPP_TOP2_DPP_CONTROL__DPP_CLOCK_ENABLE_MASK … macro
Ddcn_4_1_0_sh_mask.h15460 #define DPP_TOP2_DPP_CONTROL__DPP_CLOCK_ENABLE_MASK … macro
Ddcn_3_2_0_sh_mask.h13852 #define DPP_TOP2_DPP_CONTROL__DPP_CLOCK_ENABLE_MASK … macro