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Searched refs:DPG3_DPG_CONTROL__DPG_VRES_MASK (Results 1 – 14 of 14) sorted by relevance

/linux-6.14.4/drivers/gpu/drm/amd/include/asic_reg/dcn/
Ddcn_2_1_0_sh_mask.h26240 #define DPG3_DPG_CONTROL__DPG_VRES_MASK … macro
Ddcn_3_0_1_sh_mask.h22439 #define DPG3_DPG_CONTROL__DPG_VRES_MASK … macro
Ddcn_3_2_1_sh_mask.h23869 #define DPG3_DPG_CONTROL__DPG_VRES_MASK … macro
Ddcn_3_5_0_sh_mask.h20553 #define DPG3_DPG_CONTROL__DPG_VRES_MASK … macro
Ddcn_3_1_5_sh_mask.h26685 #define DPG3_DPG_CONTROL__DPG_VRES_MASK … macro
Ddcn_3_5_1_sh_mask.h20532 #define DPG3_DPG_CONTROL__DPG_VRES_MASK … macro
Ddcn_3_1_2_sh_mask.h28662 #define DPG3_DPG_CONTROL__DPG_VRES_MASK … macro
Ddcn_3_1_6_sh_mask.h29426 #define DPG3_DPG_CONTROL__DPG_VRES_MASK … macro
Ddcn_3_0_2_sh_mask.h25502 #define DPG3_DPG_CONTROL__DPG_VRES_MASK … macro
Ddcn_3_1_4_sh_mask.h30679 #define DPG3_DPG_CONTROL__DPG_VRES_MASK … macro
Ddcn_2_0_0_sh_mask.h29589 #define DPG3_DPG_CONTROL__DPG_VRES_MASK … macro
Ddcn_3_0_0_sh_mask.h28746 #define DPG3_DPG_CONTROL__DPG_VRES_MASK … macro
Ddcn_4_1_0_sh_mask.h26196 #define DPG3_DPG_CONTROL__DPG_VRES_MASK … macro
Ddcn_3_2_0_sh_mask.h23893 #define DPG3_DPG_CONTROL__DPG_VRES_MASK … macro