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Searched refs:DPG2_DPG_CONTROL__DPG_VRES_MASK (Results 1 – 14 of 14) sorted by relevance

/linux-6.14.4/drivers/gpu/drm/amd/include/asic_reg/dcn/
Ddcn_2_1_0_sh_mask.h25996 #define DPG2_DPG_CONTROL__DPG_VRES_MASK … macro
Ddcn_3_0_1_sh_mask.h22199 #define DPG2_DPG_CONTROL__DPG_VRES_MASK … macro
Ddcn_3_2_1_sh_mask.h23629 #define DPG2_DPG_CONTROL__DPG_VRES_MASK … macro
Ddcn_3_5_0_sh_mask.h20359 #define DPG2_DPG_CONTROL__DPG_VRES_MASK … macro
Ddcn_3_1_5_sh_mask.h26445 #define DPG2_DPG_CONTROL__DPG_VRES_MASK … macro
Ddcn_3_5_1_sh_mask.h20338 #define DPG2_DPG_CONTROL__DPG_VRES_MASK … macro
Ddcn_3_1_2_sh_mask.h28422 #define DPG2_DPG_CONTROL__DPG_VRES_MASK … macro
Ddcn_3_1_6_sh_mask.h29186 #define DPG2_DPG_CONTROL__DPG_VRES_MASK … macro
Ddcn_3_0_2_sh_mask.h25262 #define DPG2_DPG_CONTROL__DPG_VRES_MASK … macro
Ddcn_3_1_4_sh_mask.h30439 #define DPG2_DPG_CONTROL__DPG_VRES_MASK … macro
Ddcn_2_0_0_sh_mask.h29345 #define DPG2_DPG_CONTROL__DPG_VRES_MASK … macro
Ddcn_3_0_0_sh_mask.h28509 #define DPG2_DPG_CONTROL__DPG_VRES_MASK … macro
Ddcn_4_1_0_sh_mask.h25956 #define DPG2_DPG_CONTROL__DPG_VRES_MASK … macro
Ddcn_3_2_0_sh_mask.h23653 #define DPG2_DPG_CONTROL__DPG_VRES_MASK … macro