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Searched refs:DPG1_DPG_CONTROL__DPG_VRES__SHIFT (Results 1 – 16 of 16) sorted by relevance

/linux-6.14.4/drivers/gpu/drm/amd/include/asic_reg/dcn/
Ddcn_2_0_1_sh_mask.h13992 #define DPG1_DPG_CONTROL__DPG_VRES__SHIFT … macro
Ddcn_3_0_3_sh_mask.h13881 #define DPG1_DPG_CONTROL__DPG_VRES__SHIFT … macro
Ddcn_2_1_0_sh_mask.h25745 #define DPG1_DPG_CONTROL__DPG_VRES__SHIFT … macro
Ddcn_3_0_1_sh_mask.h21952 #define DPG1_DPG_CONTROL__DPG_VRES__SHIFT … macro
Ddcn_3_2_1_sh_mask.h23382 #define DPG1_DPG_CONTROL__DPG_VRES__SHIFT … macro
Ddcn_3_5_0_sh_mask.h20158 #define DPG1_DPG_CONTROL__DPG_VRES__SHIFT … macro
Ddcn_3_1_5_sh_mask.h26198 #define DPG1_DPG_CONTROL__DPG_VRES__SHIFT … macro
Ddcn_3_5_1_sh_mask.h20137 #define DPG1_DPG_CONTROL__DPG_VRES__SHIFT … macro
Ddcn_3_1_2_sh_mask.h28175 #define DPG1_DPG_CONTROL__DPG_VRES__SHIFT … macro
Ddcn_3_1_6_sh_mask.h28939 #define DPG1_DPG_CONTROL__DPG_VRES__SHIFT … macro
Ddcn_3_0_2_sh_mask.h25015 #define DPG1_DPG_CONTROL__DPG_VRES__SHIFT … macro
Ddcn_3_1_4_sh_mask.h30192 #define DPG1_DPG_CONTROL__DPG_VRES__SHIFT … macro
Ddcn_2_0_0_sh_mask.h29094 #define DPG1_DPG_CONTROL__DPG_VRES__SHIFT … macro
Ddcn_3_0_0_sh_mask.h28265 #define DPG1_DPG_CONTROL__DPG_VRES__SHIFT … macro
Ddcn_4_1_0_sh_mask.h25709 #define DPG1_DPG_CONTROL__DPG_VRES__SHIFT … macro
Ddcn_3_2_0_sh_mask.h23406 #define DPG1_DPG_CONTROL__DPG_VRES__SHIFT … macro