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Searched refs:DPG0_DPG_CONTROL__DPG_VRES_MASK (Results 1 – 16 of 16) sorted by relevance

/linux-6.14.4/drivers/gpu/drm/amd/include/asic_reg/dcn/
Ddcn_2_0_1_sh_mask.h13800 #define DPG0_DPG_CONTROL__DPG_VRES_MASK … macro
Ddcn_3_0_3_sh_mask.h13648 #define DPG0_DPG_CONTROL__DPG_VRES_MASK … macro
Ddcn_2_1_0_sh_mask.h25508 #define DPG0_DPG_CONTROL__DPG_VRES_MASK … macro
Ddcn_3_0_1_sh_mask.h21719 #define DPG0_DPG_CONTROL__DPG_VRES_MASK … macro
Ddcn_3_2_1_sh_mask.h23149 #define DPG0_DPG_CONTROL__DPG_VRES_MASK … macro
Ddcn_3_5_0_sh_mask.h19971 #define DPG0_DPG_CONTROL__DPG_VRES_MASK … macro
Ddcn_3_1_5_sh_mask.h25965 #define DPG0_DPG_CONTROL__DPG_VRES_MASK … macro
Ddcn_3_5_1_sh_mask.h19950 #define DPG0_DPG_CONTROL__DPG_VRES_MASK … macro
Ddcn_3_1_2_sh_mask.h27942 #define DPG0_DPG_CONTROL__DPG_VRES_MASK … macro
Ddcn_3_1_6_sh_mask.h28706 #define DPG0_DPG_CONTROL__DPG_VRES_MASK … macro
Ddcn_3_0_2_sh_mask.h24782 #define DPG0_DPG_CONTROL__DPG_VRES_MASK … macro
Ddcn_3_1_4_sh_mask.h29959 #define DPG0_DPG_CONTROL__DPG_VRES_MASK … macro
Ddcn_2_0_0_sh_mask.h28857 #define DPG0_DPG_CONTROL__DPG_VRES_MASK … macro
Ddcn_3_0_0_sh_mask.h28035 #define DPG0_DPG_CONTROL__DPG_VRES_MASK … macro
Ddcn_4_1_0_sh_mask.h25476 #define DPG0_DPG_CONTROL__DPG_VRES_MASK … macro
Ddcn_3_2_0_sh_mask.h23173 #define DPG0_DPG_CONTROL__DPG_VRES_MASK … macro