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Searched refs:CXL_COMPONENT_REG_BLOCK_SIZE (Results 1 – 4 of 4) sorted by relevance

/linux-6.14.4/drivers/cxl/core/
Dregs.c635 if (!IS_ALIGNED(component_reg_phys, CXL_COMPONENT_REG_BLOCK_SIZE)) in __rcrb_to_component()
Dport.c764 map->max_size = CXL_COMPONENT_REG_BLOCK_SIZE; in cxl_setup_comp_regs()
/linux-6.14.4/drivers/cxl/
Dcxl.h26 #define CXL_COMPONENT_REG_BLOCK_SIZE SZ_64K macro
Dpci.c499 map->max_size = CXL_COMPONENT_REG_BLOCK_SIZE; in cxl_rcrb_get_comp_regs()