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Searched refs:CPM_CONTROL__L1_1_PWR_GATE_ENABLE_MASK (Results 1 – 5 of 5) sorted by relevance

/linux-6.14.4/drivers/gpu/drm/amd/include/asic_reg/pcie/
Dpcie_6_1_0_sh_mask.h3679 #define CPM_CONTROL__L1_1_PWR_GATE_ENABLE_MASK … macro
/linux-6.14.4/drivers/gpu/drm/amd/include/asic_reg/nbio/
Dnbio_7_4_sh_mask.h44508 #define CPM_CONTROL__L1_1_PWR_GATE_ENABLE_MASK … macro
Dnbio_4_3_0_sh_mask.h33933 #define CPM_CONTROL__L1_1_PWR_GATE_ENABLE_MASK … macro
Dnbio_2_3_sh_mask.h56029 #define CPM_CONTROL__L1_1_PWR_GATE_ENABLE_MASK … macro
Dnbio_7_2_0_sh_mask.h101565 #define CPM_CONTROL__L1_1_PWR_GATE_ENABLE_MASK … macro