| /btstack/port/renesas-ek-ra6m4a-da14531/e2-project/ra/arm/CMSIS_5/CMSIS/Core/Include/ |
| H A D | core_cm4.h | 622 #define SCB_CFSR_MEMFAULTSR_Pos 0U /*!< SCB … macro
626 #define SCB_CFSR_MMARVALID_Pos (SCB_CFSR_MEMFAULTSR_Pos + 7U) /*!< SCB …
629 #define SCB_CFSR_MLSPERR_Pos (SCB_CFSR_MEMFAULTSR_Pos + 5U) /*!< SCB …
632 #define SCB_CFSR_MSTKERR_Pos (SCB_CFSR_MEMFAULTSR_Pos + 4U) /*!< SCB …
635 #define SCB_CFSR_MUNSTKERR_Pos (SCB_CFSR_MEMFAULTSR_Pos + 3U) /*!< SCB …
638 #define SCB_CFSR_DACCVIOL_Pos (SCB_CFSR_MEMFAULTSR_Pos + 1U) /*!< SCB …
641 #define SCB_CFSR_IACCVIOL_Pos (SCB_CFSR_MEMFAULTSR_Pos + 0U) /*!< SCB …
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| H A D | core_sc300.h | 561 #define SCB_CFSR_MEMFAULTSR_Pos 0U /*!< SCB … macro
565 #define SCB_CFSR_MMARVALID_Pos (SCB_CFSR_MEMFAULTSR_Pos + 7U) /*!< SCB …
568 #define SCB_CFSR_MSTKERR_Pos (SCB_CFSR_MEMFAULTSR_Pos + 4U) /*!< SCB …
571 #define SCB_CFSR_MUNSTKERR_Pos (SCB_CFSR_MEMFAULTSR_Pos + 3U) /*!< SCB …
574 #define SCB_CFSR_DACCVIOL_Pos (SCB_CFSR_MEMFAULTSR_Pos + 1U) /*!< SCB …
577 #define SCB_CFSR_IACCVIOL_Pos (SCB_CFSR_MEMFAULTSR_Pos + 0U) /*!< SCB …
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| H A D | core_cm3.h | 564 #define SCB_CFSR_MEMFAULTSR_Pos 0U /*!< SCB … macro
568 #define SCB_CFSR_MMARVALID_Pos (SCB_CFSR_MEMFAULTSR_Pos + 7U) /*!< SCB …
571 #define SCB_CFSR_MSTKERR_Pos (SCB_CFSR_MEMFAULTSR_Pos + 4U) /*!< SCB …
574 #define SCB_CFSR_MUNSTKERR_Pos (SCB_CFSR_MEMFAULTSR_Pos + 3U) /*!< SCB …
577 #define SCB_CFSR_DACCVIOL_Pos (SCB_CFSR_MEMFAULTSR_Pos + 1U) /*!< SCB …
580 #define SCB_CFSR_IACCVIOL_Pos (SCB_CFSR_MEMFAULTSR_Pos + 0U) /*!< SCB …
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| H A D | core_cm7.h | 676 #define SCB_CFSR_MEMFAULTSR_Pos 0U /*!< SCB … macro
680 #define SCB_CFSR_MMARVALID_Pos (SCB_CFSR_MEMFAULTSR_Pos + 7U) /*!< SCB …
683 #define SCB_CFSR_MLSPERR_Pos (SCB_CFSR_MEMFAULTSR_Pos + 5U) /*!< SCB …
686 #define SCB_CFSR_MSTKERR_Pos (SCB_CFSR_MEMFAULTSR_Pos + 4U) /*!< SCB …
689 #define SCB_CFSR_MUNSTKERR_Pos (SCB_CFSR_MEMFAULTSR_Pos + 3U) /*!< SCB …
692 #define SCB_CFSR_DACCVIOL_Pos (SCB_CFSR_MEMFAULTSR_Pos + 1U) /*!< SCB …
695 #define SCB_CFSR_IACCVIOL_Pos (SCB_CFSR_MEMFAULTSR_Pos + 0U) /*!< SCB …
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| H A D | core_cm35p.h | 745 #define SCB_CFSR_MEMFAULTSR_Pos 0U /*!< SCB … macro
749 #define SCB_CFSR_MMARVALID_Pos (SCB_CFSR_MEMFAULTSR_Pos + 7U) /*!< SCB …
752 #define SCB_CFSR_MLSPERR_Pos (SCB_CFSR_MEMFAULTSR_Pos + 5U) /*!< SCB …
755 #define SCB_CFSR_MSTKERR_Pos (SCB_CFSR_MEMFAULTSR_Pos + 4U) /*!< SCB …
758 #define SCB_CFSR_MUNSTKERR_Pos (SCB_CFSR_MEMFAULTSR_Pos + 3U) /*!< SCB …
761 #define SCB_CFSR_DACCVIOL_Pos (SCB_CFSR_MEMFAULTSR_Pos + 1U) /*!< SCB …
764 #define SCB_CFSR_IACCVIOL_Pos (SCB_CFSR_MEMFAULTSR_Pos + 0U) /*!< SCB …
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| H A D | core_armv8mml.h | 745 #define SCB_CFSR_MEMFAULTSR_Pos 0U /*!< SCB … macro
749 #define SCB_CFSR_MMARVALID_Pos (SCB_CFSR_MEMFAULTSR_Pos + 7U) /*!< SCB …
752 #define SCB_CFSR_MLSPERR_Pos (SCB_CFSR_MEMFAULTSR_Pos + 5U) /*!< SCB …
755 #define SCB_CFSR_MSTKERR_Pos (SCB_CFSR_MEMFAULTSR_Pos + 4U) /*!< SCB …
758 #define SCB_CFSR_MUNSTKERR_Pos (SCB_CFSR_MEMFAULTSR_Pos + 3U) /*!< SCB …
761 #define SCB_CFSR_DACCVIOL_Pos (SCB_CFSR_MEMFAULTSR_Pos + 1U) /*!< SCB …
764 #define SCB_CFSR_IACCVIOL_Pos (SCB_CFSR_MEMFAULTSR_Pos + 0U) /*!< SCB …
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| H A D | core_cm33.h | 745 #define SCB_CFSR_MEMFAULTSR_Pos 0U /*!< SCB … macro
749 #define SCB_CFSR_MMARVALID_Pos (SCB_CFSR_MEMFAULTSR_Pos + 7U) /*!< SCB …
752 #define SCB_CFSR_MLSPERR_Pos (SCB_CFSR_MEMFAULTSR_Pos + 5U) /*!< SCB …
755 #define SCB_CFSR_MSTKERR_Pos (SCB_CFSR_MEMFAULTSR_Pos + 4U) /*!< SCB …
758 #define SCB_CFSR_MUNSTKERR_Pos (SCB_CFSR_MEMFAULTSR_Pos + 3U) /*!< SCB …
761 #define SCB_CFSR_DACCVIOL_Pos (SCB_CFSR_MEMFAULTSR_Pos + 1U) /*!< SCB …
764 #define SCB_CFSR_IACCVIOL_Pos (SCB_CFSR_MEMFAULTSR_Pos + 0U) /*!< SCB …
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| H A D | core_cm55.h | 765 #define SCB_CFSR_MEMFAULTSR_Pos 0U /*!< SCB … macro
769 #define SCB_CFSR_MMARVALID_Pos (SCB_CFSR_MEMFAULTSR_Pos + 7U) /*!< SCB …
772 #define SCB_CFSR_MLSPERR_Pos (SCB_CFSR_MEMFAULTSR_Pos + 5U) /*!< SCB …
775 #define SCB_CFSR_MSTKERR_Pos (SCB_CFSR_MEMFAULTSR_Pos + 4U) /*!< SCB …
778 #define SCB_CFSR_MUNSTKERR_Pos (SCB_CFSR_MEMFAULTSR_Pos + 3U) /*!< SCB …
781 #define SCB_CFSR_DACCVIOL_Pos (SCB_CFSR_MEMFAULTSR_Pos + 1U) /*!< SCB …
784 #define SCB_CFSR_IACCVIOL_Pos (SCB_CFSR_MEMFAULTSR_Pos + 0U) /*!< SCB …
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| H A D | core_armv81mml.h | 765 #define SCB_CFSR_MEMFAULTSR_Pos 0U /*!< SCB … macro
769 #define SCB_CFSR_MMARVALID_Pos (SCB_CFSR_MEMFAULTSR_Pos + 7U) /*!< SCB …
772 #define SCB_CFSR_MLSPERR_Pos (SCB_CFSR_MEMFAULTSR_Pos + 5U) /*!< SCB …
775 #define SCB_CFSR_MSTKERR_Pos (SCB_CFSR_MEMFAULTSR_Pos + 4U) /*!< SCB …
778 #define SCB_CFSR_MUNSTKERR_Pos (SCB_CFSR_MEMFAULTSR_Pos + 3U) /*!< SCB …
781 #define SCB_CFSR_DACCVIOL_Pos (SCB_CFSR_MEMFAULTSR_Pos + 1U) /*!< SCB …
784 #define SCB_CFSR_IACCVIOL_Pos (SCB_CFSR_MEMFAULTSR_Pos + 0U) /*!< SCB …
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| /btstack/port/samv71-xplained-atwilc3000/ASF/thirdparty/CMSIS/Include/ |
| H A D | core_cm7.h | 625 #define SCB_CFSR_MEMFAULTSR_Pos 0 /*!< SCB … macro
626 #define SCB_CFSR_MEMFAULTSR_Msk (0xFFUL << SCB_CFSR_MEMFAULTSR_Pos) /*!< SCB …
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| /btstack/port/stm32-l073rz-nucleo-em9304/Drivers/CMSIS/Include/ |
| H A D | core_cm3.h | 602 #define SCB_CFSR_MEMFAULTSR_Pos 0U /*!< SCB … macro
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| H A D | core_sc300.h | 599 #define SCB_CFSR_MEMFAULTSR_Pos 0U /*!< SCB … macro
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| H A D | core_cm4.h | 662 #define SCB_CFSR_MEMFAULTSR_Pos 0U /*!< SCB … macro
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| /btstack/port/stm32-wb55xx-nucleo-freertos/Drivers/CMSIS/Include/ |
| H A D | core_cm3.h | 559 #define SCB_CFSR_MEMFAULTSR_Pos 0U /*!< SCB … macro
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| /btstack/port/msp432p401lp-cc256x/CMSIS/ |
| H A D | core_cm4.h | 650 #define SCB_CFSR_MEMFAULTSR_Pos 0U /*!< SCB … macro
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| /btstack/port/stm32-l451-miromico-sx1280/Drivers/CMSIS/Include/ |
| H A D | core_cm3.h | 559 #define SCB_CFSR_MEMFAULTSR_Pos 0U /*!< SCB … macro
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| H A D | core_sc300.h | 556 #define SCB_CFSR_MEMFAULTSR_Pos 0U /*!< SCB … macro
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| /btstack/port/stm32-f4discovery-cc256x/Drivers/CMSIS/Include/ |
| H A D | core_cm3.h | 559 #define SCB_CFSR_MEMFAULTSR_Pos 0U /*!< SCB … macro
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| H A D | core_sc300.h | 556 #define SCB_CFSR_MEMFAULTSR_Pos 0U /*!< SCB … macro
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| /btstack/port/stm32-f4discovery-usb/Drivers/CMSIS/Core/Include/ |
| H A D | core_cm3.h | 559 #define SCB_CFSR_MEMFAULTSR_Pos 0U /*!< SCB … macro
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| H A D | core_sc300.h | 556 #define SCB_CFSR_MEMFAULTSR_Pos 0U /*!< SCB … macro
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| /btstack/port/stm32-f4discovery-usb/Drivers/CMSIS/Include/ |
| H A D | core_cm3.h | 559 #define SCB_CFSR_MEMFAULTSR_Pos 0U /*!< SCB … macro
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| H A D | core_sc300.h | 556 #define SCB_CFSR_MEMFAULTSR_Pos 0U /*!< SCB … macro
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| /btstack/port/stm32-l476rg-nucleo-sx1280/Drivers/CMSIS/Include/ |
| H A D | core_cm3.h | 559 #define SCB_CFSR_MEMFAULTSR_Pos 0U /*!< SCB … macro
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| H A D | core_sc300.h | 556 #define SCB_CFSR_MEMFAULTSR_Pos 0U /*!< SCB … macro
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