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Searched refs:PLLMulTable (Results 1 – 4 of 4) sorted by relevance

/btstack/port/stm32-l073rz-nucleo-em9304/Src/
H A Dsystem_stm32l0xx.c112 const uint8_t PLLMulTable[9] = {3U, 4U, 6U, 8U, 12U, 16U, 24U, 32U, 48U}; variable
234 pllmul = PLLMulTable[(pllmul >> RCC_CFGR_PLLMUL_Pos)]; in SystemCoreClockUpdate()
/btstack/port/stm32-l073rz-nucleo-em9304/Drivers/CMSIS/Device/ST/STM32L0xx/Include/
H A Dsystem_stm32l0xx.h63 extern const uint8_t PLLMulTable[9]; /*!< PLL multipiers table values */
/btstack/port/stm32-l073rz-nucleo-em9304/Drivers/STM32L0xx_HAL_Driver/Src/
H A Dstm32l0xx_hal_rcc_ex.c45 extern const uint8_t PLLMulTable[];
465 pllmul = PLLMulTable[(pllmul >> RCC_CFGR_PLLMUL_Pos)]; in HAL_RCCEx_GetPeriphCLKFreq()
H A Dstm32l0xx_hal_rcc.c1228 pllm = PLLMulTable[(uint32_t)(tmpreg & RCC_CFGR_PLLMUL) >> RCC_CFGR_PLLMUL_Pos]; in HAL_RCC_GetSysClockFreq()