/btstack/port/stm32-f4discovery-usb/Drivers/CMSIS/Device/ST/STM32F4xx/Include/ |
H A D | stm32f410rx.h | 7025 #define DBGMCU_APB2_FZ_DBG_TIM1_STOP_Pos (0U) macro 7026 #define DBGMCU_APB2_FZ_DBG_TIM1_STOP_Msk (0x1UL << DBGMCU_APB2_FZ_DBG_TIM1_STOP_Pos) /*…
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H A D | stm32f410tx.h | 6975 #define DBGMCU_APB2_FZ_DBG_TIM1_STOP_Pos (0U) macro 6976 #define DBGMCU_APB2_FZ_DBG_TIM1_STOP_Msk (0x1UL << DBGMCU_APB2_FZ_DBG_TIM1_STOP_Pos) /*…
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H A D | stm32f410cx.h | 7021 #define DBGMCU_APB2_FZ_DBG_TIM1_STOP_Pos (0U) macro 7022 #define DBGMCU_APB2_FZ_DBG_TIM1_STOP_Msk (0x1UL << DBGMCU_APB2_FZ_DBG_TIM1_STOP_Pos) /*…
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H A D | stm32f401xe.h | 6906 #define DBGMCU_APB2_FZ_DBG_TIM1_STOP_Pos (0U) macro 6907 #define DBGMCU_APB2_FZ_DBG_TIM1_STOP_Msk (0x1UL << DBGMCU_APB2_FZ_DBG_TIM1_STOP_Pos) /*…
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H A D | stm32f401xc.h | 6906 #define DBGMCU_APB2_FZ_DBG_TIM1_STOP_Pos (0U) macro 6907 #define DBGMCU_APB2_FZ_DBG_TIM1_STOP_Msk (0x1UL << DBGMCU_APB2_FZ_DBG_TIM1_STOP_Pos) /*…
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H A D | stm32f411xe.h | 6937 #define DBGMCU_APB2_FZ_DBG_TIM1_STOP_Pos (0U) macro 6938 #define DBGMCU_APB2_FZ_DBG_TIM1_STOP_Msk (0x1UL << DBGMCU_APB2_FZ_DBG_TIM1_STOP_Pos) /*…
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H A D | stm32f412cx.h | 11573 #define DBGMCU_APB2_FZ_DBG_TIM1_STOP_Pos (0U) macro 11574 #define DBGMCU_APB2_FZ_DBG_TIM1_STOP_Msk (0x1UL << DBGMCU_APB2_FZ_DBG_TIM1_STOP_Pos) /*…
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H A D | stm32f405xx.h | 12458 #define DBGMCU_APB2_FZ_DBG_TIM1_STOP_Pos (0U) macro 12459 #define DBGMCU_APB2_FZ_DBG_TIM1_STOP_Msk (0x1UL << DBGMCU_APB2_FZ_DBG_TIM1_STOP_Pos) /*…
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H A D | stm32f415xx.h | 12743 #define DBGMCU_APB2_FZ_DBG_TIM1_STOP_Pos (0U) macro 12744 #define DBGMCU_APB2_FZ_DBG_TIM1_STOP_Msk (0x1UL << DBGMCU_APB2_FZ_DBG_TIM1_STOP_Pos) /*…
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H A D | stm32f412zx.h | 12583 #define DBGMCU_APB2_FZ_DBG_TIM1_STOP_Pos (0U) macro 12584 #define DBGMCU_APB2_FZ_DBG_TIM1_STOP_Msk (0x1UL << DBGMCU_APB2_FZ_DBG_TIM1_STOP_Pos) /*…
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H A D | stm32f407xx.h | 12794 #define DBGMCU_APB2_FZ_DBG_TIM1_STOP_Pos (0U) macro 12795 #define DBGMCU_APB2_FZ_DBG_TIM1_STOP_Msk (0x1UL << DBGMCU_APB2_FZ_DBG_TIM1_STOP_Pos) /*…
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H A D | stm32f412vx.h | 12563 #define DBGMCU_APB2_FZ_DBG_TIM1_STOP_Pos (0U) macro 12564 #define DBGMCU_APB2_FZ_DBG_TIM1_STOP_Msk (0x1UL << DBGMCU_APB2_FZ_DBG_TIM1_STOP_Pos) /*…
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H A D | stm32f413xx.h | 13478 #define DBGMCU_APB2_FZ_DBG_TIM1_STOP_Pos (0U) macro 13479 #define DBGMCU_APB2_FZ_DBG_TIM1_STOP_Msk (0x1UL << DBGMCU_APB2_FZ_DBG_TIM1_STOP_Pos) /*…
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H A D | stm32f423xx.h | 13628 #define DBGMCU_APB2_FZ_DBG_TIM1_STOP_Pos (0U) macro 13629 #define DBGMCU_APB2_FZ_DBG_TIM1_STOP_Msk (0x1UL << DBGMCU_APB2_FZ_DBG_TIM1_STOP_Pos) /*…
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H A D | stm32f412rx.h | 12550 #define DBGMCU_APB2_FZ_DBG_TIM1_STOP_Pos (0U) macro 12551 #define DBGMCU_APB2_FZ_DBG_TIM1_STOP_Msk (0x1UL << DBGMCU_APB2_FZ_DBG_TIM1_STOP_Pos) /*…
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H A D | stm32f417xx.h | 13074 #define DBGMCU_APB2_FZ_DBG_TIM1_STOP_Pos (0U) macro 13075 #define DBGMCU_APB2_FZ_DBG_TIM1_STOP_Msk (0x1UL << DBGMCU_APB2_FZ_DBG_TIM1_STOP_Pos) /*…
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H A D | stm32f446xx.h | 14026 #define DBGMCU_APB2_FZ_DBG_TIM1_STOP_Pos (0U) macro 14027 #define DBGMCU_APB2_FZ_DBG_TIM1_STOP_Msk (0x1UL << DBGMCU_APB2_FZ_DBG_TIM1_STOP_Pos) /*…
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H A D | stm32f427xx.h | 13990 #define DBGMCU_APB2_FZ_DBG_TIM1_STOP_Pos (0U) macro 13991 #define DBGMCU_APB2_FZ_DBG_TIM1_STOP_Msk (0x1UL << DBGMCU_APB2_FZ_DBG_TIM1_STOP_Pos) /*…
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H A D | stm32f437xx.h | 14292 #define DBGMCU_APB2_FZ_DBG_TIM1_STOP_Pos (0U) macro 14293 #define DBGMCU_APB2_FZ_DBG_TIM1_STOP_Msk (0x1UL << DBGMCU_APB2_FZ_DBG_TIM1_STOP_Pos) /*…
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H A D | stm32f429xx.h | 14346 #define DBGMCU_APB2_FZ_DBG_TIM1_STOP_Pos (0U) macro 14347 #define DBGMCU_APB2_FZ_DBG_TIM1_STOP_Msk (0x1UL << DBGMCU_APB2_FZ_DBG_TIM1_STOP_Pos) /*…
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H A D | stm32f439xx.h | 14640 #define DBGMCU_APB2_FZ_DBG_TIM1_STOP_Pos (0U) macro 14641 #define DBGMCU_APB2_FZ_DBG_TIM1_STOP_Msk (0x1UL << DBGMCU_APB2_FZ_DBG_TIM1_STOP_Pos) /*…
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H A D | stm32f469xx.h | 17362 #define DBGMCU_APB2_FZ_DBG_TIM1_STOP_Pos (0U) macro 17363 #define DBGMCU_APB2_FZ_DBG_TIM1_STOP_Msk (0x1UL << DBGMCU_APB2_FZ_DBG_TIM1_STOP_Pos) /*…
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H A D | stm32f479xx.h | 17659 #define DBGMCU_APB2_FZ_DBG_TIM1_STOP_Pos (0U) macro 17660 #define DBGMCU_APB2_FZ_DBG_TIM1_STOP_Msk (0x1UL << DBGMCU_APB2_FZ_DBG_TIM1_STOP_Pos) /*…
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/btstack/port/stm32-f4discovery-cc256x/Drivers/CMSIS/Device/ST/STM32F4xx/Include/ |
H A D | stm32f407xx.h | 12810 #define DBGMCU_APB2_FZ_DBG_TIM1_STOP_Pos (0U) macro 12811 #define DBGMCU_APB2_FZ_DBG_TIM1_STOP_Msk (0x1UL << DBGMCU_APB2_FZ_DBG_TIM1_STOP_Pos) /*…
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