| /btstack/port/stm32-l073rz-nucleo-em9304/Drivers/CMSIS/Include/ |
| H A D | core_cm3.h | 1256 #define CoreDebug_DHCSR_S_SLEEP_Pos 18U /*!< Core… macro
1257 #define CoreDebug_DHCSR_S_SLEEP_Msk (1UL << CoreDebug_DHCSR_S_SLEEP_Pos) /*!< Core…
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| H A D | core_sc300.h | 1238 #define CoreDebug_DHCSR_S_SLEEP_Pos 18U /*!< Core… macro
1239 #define CoreDebug_DHCSR_S_SLEEP_Msk (1UL << CoreDebug_DHCSR_S_SLEEP_Pos) /*!< Core…
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| H A D | core_cm4.h | 1425 #define CoreDebug_DHCSR_S_SLEEP_Pos 18U /*!< Core… macro
1426 #define CoreDebug_DHCSR_S_SLEEP_Msk (1UL << CoreDebug_DHCSR_S_SLEEP_Pos) /*!< Core…
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| /btstack/port/stm32-wb55xx-nucleo-freertos/Drivers/CMSIS/Include/ |
| H A D | core_cm3.h | 1275 #define CoreDebug_DHCSR_S_SLEEP_Pos 18U /*!< Core… macro
1276 #define CoreDebug_DHCSR_S_SLEEP_Msk (1UL << CoreDebug_DHCSR_S_SLEEP_Pos) /*!< Core…
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| H A D | core_sc300.h | 1255 #define CoreDebug_DHCSR_S_SLEEP_Pos 18U /*!< Core… macro
1256 #define CoreDebug_DHCSR_S_SLEEP_Msk (1UL << CoreDebug_DHCSR_S_SLEEP_Pos) /*!< Core…
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| /btstack/port/msp432p401lp-cc256x/CMSIS/ |
| H A D | core_cm4.h | 1397 #define CoreDebug_DHCSR_S_SLEEP_Pos 18U /*!< Core… macro
1398 #define CoreDebug_DHCSR_S_SLEEP_Msk (1UL << CoreDebug_DHCSR_S_SLEEP_Pos) /*!< Core…
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| /btstack/port/stm32-l451-miromico-sx1280/Drivers/CMSIS/Include/ |
| H A D | core_cm3.h | 1275 #define CoreDebug_DHCSR_S_SLEEP_Pos 18U /*!< Core… macro
1276 #define CoreDebug_DHCSR_S_SLEEP_Msk (1UL << CoreDebug_DHCSR_S_SLEEP_Pos) /*!< Core…
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| H A D | core_sc300.h | 1255 #define CoreDebug_DHCSR_S_SLEEP_Pos 18U /*!< Core… macro
1256 #define CoreDebug_DHCSR_S_SLEEP_Msk (1UL << CoreDebug_DHCSR_S_SLEEP_Pos) /*!< Core…
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| H A D | core_armv8mbl.h | 1015 #define CoreDebug_DHCSR_S_SLEEP_Pos 18U /*!< Core… macro
1016 #define CoreDebug_DHCSR_S_SLEEP_Msk (1UL << CoreDebug_DHCSR_S_SLEEP_Pos) /*!< Core…
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| /btstack/port/stm32-f4discovery-cc256x/Drivers/CMSIS/Include/ |
| H A D | core_cm3.h | 1275 #define CoreDebug_DHCSR_S_SLEEP_Pos 18U /*!< Core… macro
1276 #define CoreDebug_DHCSR_S_SLEEP_Msk (1UL << CoreDebug_DHCSR_S_SLEEP_Pos) /*!< Core…
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| H A D | core_armv8mbl.h | 1015 #define CoreDebug_DHCSR_S_SLEEP_Pos 18U /*!< Core… macro
1016 #define CoreDebug_DHCSR_S_SLEEP_Msk (1UL << CoreDebug_DHCSR_S_SLEEP_Pos) /*!< Core…
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| H A D | core_sc300.h | 1255 #define CoreDebug_DHCSR_S_SLEEP_Pos 18U /*!< Core… macro
1256 #define CoreDebug_DHCSR_S_SLEEP_Msk (1UL << CoreDebug_DHCSR_S_SLEEP_Pos) /*!< Core…
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| /btstack/port/stm32-f4discovery-usb/Drivers/CMSIS/Core/Include/ |
| H A D | core_cm3.h | 1275 #define CoreDebug_DHCSR_S_SLEEP_Pos 18U /*!< Core… macro
1276 #define CoreDebug_DHCSR_S_SLEEP_Msk (1UL << CoreDebug_DHCSR_S_SLEEP_Pos) /*!< Core…
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| H A D | core_sc300.h | 1255 #define CoreDebug_DHCSR_S_SLEEP_Pos 18U /*!< Core… macro
1256 #define CoreDebug_DHCSR_S_SLEEP_Msk (1UL << CoreDebug_DHCSR_S_SLEEP_Pos) /*!< Core…
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| H A D | core_armv8mbl.h | 1015 #define CoreDebug_DHCSR_S_SLEEP_Pos 18U /*!< Core… macro
1016 #define CoreDebug_DHCSR_S_SLEEP_Msk (1UL << CoreDebug_DHCSR_S_SLEEP_Pos) /*!< Core…
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| /btstack/port/stm32-f4discovery-usb/Drivers/CMSIS/Include/ |
| H A D | core_cm3.h | 1275 #define CoreDebug_DHCSR_S_SLEEP_Pos 18U /*!< Core… macro
1276 #define CoreDebug_DHCSR_S_SLEEP_Msk (1UL << CoreDebug_DHCSR_S_SLEEP_Pos) /*!< Core…
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| H A D | core_sc300.h | 1255 #define CoreDebug_DHCSR_S_SLEEP_Pos 18U /*!< Core… macro
1256 #define CoreDebug_DHCSR_S_SLEEP_Msk (1UL << CoreDebug_DHCSR_S_SLEEP_Pos) /*!< Core…
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| H A D | core_armv8mbl.h | 1015 #define CoreDebug_DHCSR_S_SLEEP_Pos 18U /*!< Core… macro
1016 #define CoreDebug_DHCSR_S_SLEEP_Msk (1UL << CoreDebug_DHCSR_S_SLEEP_Pos) /*!< Core…
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| /btstack/port/renesas-tb-s1ja-cc256x/template/btstack_example/synergy/ssp/inc/bsp/cmsis/Include/ |
| H A D | core_armv8mbl.h | 1062 #define CoreDebug_DHCSR_S_SLEEP_Pos 18U /*!< Core… macro
1063 #define CoreDebug_DHCSR_S_SLEEP_Msk (1UL << CoreDebug_DHCSR_S_SLEEP_Pos) /*!< Core…
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| H A D | core_cm23.h | 1062 #define CoreDebug_DHCSR_S_SLEEP_Pos 18U /*!< Core… macro
1063 #define CoreDebug_DHCSR_S_SLEEP_Msk (1UL << CoreDebug_DHCSR_S_SLEEP_Pos) /*!< Core…
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| /btstack/port/stm32-l476rg-nucleo-sx1280/Drivers/CMSIS/Include/ |
| H A D | core_cm3.h | 1267 #define CoreDebug_DHCSR_S_SLEEP_Pos 18U /*!< Core… macro
1268 #define CoreDebug_DHCSR_S_SLEEP_Msk (1UL << CoreDebug_DHCSR_S_SLEEP_Pos) /*!< Core…
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| H A D | core_armv8mbl.h | 1015 #define CoreDebug_DHCSR_S_SLEEP_Pos 18U /*!< Core… macro
1016 #define CoreDebug_DHCSR_S_SLEEP_Msk (1UL << CoreDebug_DHCSR_S_SLEEP_Pos) /*!< Core…
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| H A D | core_sc300.h | 1250 #define CoreDebug_DHCSR_S_SLEEP_Pos 18U /*!< Core… macro
1251 #define CoreDebug_DHCSR_S_SLEEP_Msk (1UL << CoreDebug_DHCSR_S_SLEEP_Pos) /*!< Core…
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| /btstack/port/renesas-ek-ra6m4a-da14531/e2-project/ra/arm/CMSIS_5/CMSIS/Core/Include/ |
| H A D | core_sc300.h | 1255 #define CoreDebug_DHCSR_S_SLEEP_Pos 18U /*!< Core… macro
1256 #define CoreDebug_DHCSR_S_SLEEP_Msk (1UL << CoreDebug_DHCSR_S_SLEEP_Pos) /*!< Core…
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| H A D | core_cm3.h | 1272 #define CoreDebug_DHCSR_S_SLEEP_Pos 18U /*!< Core… macro
1273 #define CoreDebug_DHCSR_S_SLEEP_Msk (1UL << CoreDebug_DHCSR_S_SLEEP_Pos) /*!< Core…
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