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Searched refs:CS_CTL1_SELM_MASK (Results 1 – 11 of 11) sorted by relevance

/btstack/port/msp432p401lp-cc256x/
H A Dsystem_msp432p401r.c109 source = CS->CTL1 & CS_CTL1_SELM_MASK; in SystemCoreClockUpdate()
291 CS->CTL1 = (CS->CTL1 & ~(CS_CTL1_SELM_MASK | CS_CTL1_DIVM_MASK)) | CS_CTL1_SELM__DCOCLK; in SystemInit()
314 CS->CTL1 = (CS->CTL1 & ~(CS_CTL1_SELM_MASK | CS_CTL1_DIVM_MASK)) | CS_CTL1_SELM__DCOCLK; in SystemInit()
337 CS->CTL1 = (CS->CTL1 & ~(CS_CTL1_SELM_MASK | CS_CTL1_DIVM_MASK)) | CS_CTL1_SELM__DCOCLK; in SystemInit()
362 CS->CTL1 = (CS->CTL1 & ~(CS_CTL1_SELM_MASK | CS_CTL1_DIVM_MASK)) | CS_CTL1_SELM__DCOCLK; in SystemInit()
/btstack/port/msp432p401lp-cc256x/ti/devices/msp432p4xx/driverlib/
H A Dcs.c258 | (CS->CTL1 & ~(CS_CTL1_SELM_MASK | CS_CTL1_DIVM_MASK)); in CS_initClockSignal()
836 wSource = (CS->CTL1 & CS_CTL1_SELM_MASK) << CS_MCLK_SRC_BITPOS; in CS_getMCLK()
/btstack/port/msp432p401lp-cc256x/ti/devices/msp432p4xx/inc/
H A Dmsp432p401m.h2623 #define CS_CTL1_SELM_MASK ((uint32_t)0x00000007) /*!< SELM Bit Mask… macro
H A Dmsp432p401r.h2623 #define CS_CTL1_SELM_MASK ((uint32_t)0x00000007) /*!< SELM Bit Mask… macro
H A Dmsp432p401y.h2556 #define CS_CTL1_SELM_MASK ((uint32_t)0x00000007) /*!< SELM Bit Mask… macro
H A Dmsp432p4011.h2556 #define CS_CTL1_SELM_MASK ((uint32_t)0x00000007) /*!< SELM Bit Mask… macro
H A Dmsp432p401v.h2556 #define CS_CTL1_SELM_MASK ((uint32_t)0x00000007) /*!< SELM Bit Mask… macro
H A Dmsp432p411y.h2603 #define CS_CTL1_SELM_MASK ((uint32_t)0x00000007) /*!< SELM Bit Mask… macro
H A Dmsp432p411v.h2603 #define CS_CTL1_SELM_MASK ((uint32_t)0x00000007) /*!< SELM Bit Mask… macro
H A Dmsp432p4111.h2603 #define CS_CTL1_SELM_MASK ((uint32_t)0x00000007) /*!< SELM Bit Mask… macro
H A Dmsp432p4xx.h2272 #define CS_CTL1_SELM_MASK ((uint32_t)0x00000007) /*!< SELM Bit Mask… macro