/aosp_15_r20/external/llvm/test/MC/ARM/ |
H A D | neont2-shiftaccum-encoding.s | 153 vsri.8 d28, d11, #8 154 vsri.16 d26, d12, #16 155 vsri.32 d24, d13, #32 156 vsri.64 d21, d14, #64 157 vsri.8 q1, q8, #8 158 vsri.16 q5, q2, #16 159 vsri.32 q7, q4, #32 160 vsri.64 q9, q6, #64 171 vsri.8 d11, #8 172 vsri.16 d12, #16 [all …]
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H A D | neon-shiftaccum-encoding.s | 150 vsri.8 d28, d11, #8 151 vsri.16 d26, d12, #16 152 vsri.32 d24, d13, #32 153 vsri.64 d21, d14, #64 154 vsri.8 q1, q8, #8 155 vsri.16 q5, q2, #16 156 vsri.32 q7, q4, #32 157 vsri.64 q9, q6, #64 168 vsri.8 d11, #8 169 vsri.16 d12, #16 [all …]
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H A D | neon-shift-encoding.s | 181 vsri.8 d16, d6, #7 182 vsri.16 d26, d18, #15 183 vsri.32 d11, d10, #31 184 vsri.64 d12, d19, #63 185 vsri.8 q1, q8, #7 186 vsri.16 q2, q7, #15 187 vsri.32 q3, q6, #31 188 vsri.64 q4, q5, #63 190 vsri.8 d16, #7 191 vsri.16 d15, #15 [all …]
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/aosp_15_r20/external/capstone/suite/MC/ARM/ |
H A D | neon-shiftaccum-encoding.s.cs | 74 0x1b,0xc4,0xc8,0xf3 = vsri.8 d28, d11, #8 75 0x1c,0xa4,0xd0,0xf3 = vsri.16 d26, d12, #16 76 0x1d,0x84,0xe0,0xf3 = vsri.32 d24, d13, #32 77 0x9e,0x54,0xc0,0xf3 = vsri.64 d21, d14, #64 78 0x70,0x24,0x88,0xf3 = vsri.8 q1, q8, #8 79 0x54,0xa4,0x90,0xf3 = vsri.16 q5, q2, #16 80 0x58,0xe4,0xa0,0xf3 = vsri.32 q7, q4, #32 81 0xdc,0x24,0xc0,0xf3 = vsri.64 q9, q6, #64 90 0x1b,0xb4,0x88,0xf3 = vsri.8 d11, d11, #8 91 0x1c,0xc4,0x90,0xf3 = vsri.16 d12, d12, #16 [all …]
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H A D | neont2-shiftaccum-encoding.s.cs | 74 0xc8,0xff,0x1b,0xc4 = vsri.8 d28, d11, #8 75 0xd0,0xff,0x1c,0xa4 = vsri.16 d26, d12, #16 76 0xe0,0xff,0x1d,0x84 = vsri.32 d24, d13, #32 77 0xc0,0xff,0x9e,0x54 = vsri.64 d21, d14, #64 78 0x88,0xff,0x70,0x24 = vsri.8 q1, q8, #8 79 0x90,0xff,0x54,0xa4 = vsri.16 q5, q2, #16 80 0xa0,0xff,0x58,0xe4 = vsri.32 q7, q4, #32 81 0xc0,0xff,0xdc,0x24 = vsri.64 q9, q6, #64 90 0x88,0xff,0x1b,0xb4 = vsri.8 d11, d11, #8 91 0x90,0xff,0x1c,0xc4 = vsri.16 d12, d12, #16 [all …]
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H A D | neon-shift-encoding.s.cs | 82 0x16,0x04,0xc9,0xf3 = vsri.8 d16, d6, #7 83 0x32,0xa4,0xd1,0xf3 = vsri.16 d26, d18, #15 84 0x1a,0xb4,0xa1,0xf3 = vsri.32 d11, d10, #31 85 0xb3,0xc4,0x81,0xf3 = vsri.64 d12, d19, #63 86 0x70,0x24,0x89,0xf3 = vsri.8 q1, q8, #7 87 0x5e,0x44,0x91,0xf3 = vsri.16 q2, q7, #15 88 0x5c,0x64,0xa1,0xf3 = vsri.32 q3, q6, #31 89 0xda,0x84,0x81,0xf3 = vsri.64 q4, q5, #63 90 0x30,0x04,0xc9,0xf3 = vsri.8 d16, d16, #7 91 0x1f,0xf4,0x91,0xf3 = vsri.16 d15, d15, #15 [all …]
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/aosp_15_r20/frameworks/base/telephony/java/android/telephony/ |
H A D | VoiceSpecificRegistrationInfo.java | 74 VoiceSpecificRegistrationInfo(VoiceSpecificRegistrationInfo vsri) { in VoiceSpecificRegistrationInfo() argument 75 cssSupported = vsri.cssSupported; in VoiceSpecificRegistrationInfo() 76 roamingIndicator = vsri.roamingIndicator; in VoiceSpecificRegistrationInfo() 77 systemIsInPrl = vsri.systemIsInPrl; in VoiceSpecificRegistrationInfo() 78 defaultRoamingIndicator = vsri.defaultRoamingIndicator; in VoiceSpecificRegistrationInfo()
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/aosp_15_r20/external/llvm/test/CodeGen/ARM/ |
H A D | vshiftins.ll | 77 ;CHECK: vsri.8 86 ;CHECK: vsri.16 95 ;CHECK: vsri.32 104 ;CHECK: vsri.64 113 ;CHECK: vsri.8 122 ;CHECK: vsri.16 131 ;CHECK: vsri.32 140 ;CHECK: vsri.64
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/aosp_15_r20/external/llvm/test/MC/Disassembler/ARM/ |
H A D | neon.txt | 1229 # CHECK: vsri.8 d16, d16, #7 1231 # CHECK: vsri.16 d16, d16, #15 1233 # CHECK: vsri.32 d16, d16, #31 1235 # CHECK: vsri.64 d16, d16, #63 1237 # CHECK: vsri.8 q8, q8, #7 1239 # CHECK: vsri.16 q8, q8, #15 1241 # CHECK: vsri.32 q8, q8, #31 1243 # CHECK: vsri.64 q8, q8, #63 1449 # CHECK: vsri.8 d17, d16, #8 1451 # CHECK: vsri.16 d17, d16, #16 [all …]
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H A D | neon-tests.txt | 54 # CHECK: vsri.32 q15, q0, #1
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H A D | neont2.txt | 1258 # CHECK: vsri.8 d17, d16, #8 1260 # CHECK: vsri.16 d17, d16, #16 1262 # CHECK: vsri.32 d17, d16, #32 1264 # CHECK: vsri.64 d17, d16, #64 1266 # CHECK: vsri.8 q9, q8, #8 1268 # CHECK: vsri.16 q9, q8, #16 1270 # CHECK: vsri.32 q9, q8, #32 1272 # CHECK: vsri.64 q9, q8, #64
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/aosp_15_r20/external/arm-neon-tests/ |
H A D | ref_vsri_n.c | 26 #define INSN_NAME vsri
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/aosp_15_r20/external/regex-re2/ |
H A D | CONTRIBUTORS | 40 Srinivasan Venkatachary <vsri@google.com>
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/aosp_15_r20/external/rust/android-crates-io/crates/grpcio-sys/grpc/third_party/re2/ |
D | CONTRIBUTORS | 40 Srinivasan Venkatachary <vsri@google.com>
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/aosp_15_r20/external/rust/android-crates-io/crates/quiche/deps/boringssl/linux-arm/crypto/fipsmodule/ |
D | sha1-armv4-large.S | 576 vsri.32 q8,q12,#31 623 vsri.32 q9,q12,#31 669 vsri.32 q10,q12,#31 715 vsri.32 q11,q12,#31
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/aosp_15_r20/external/openscreen/third_party/boringssl/linux-arm/crypto/fipsmodule/ |
H A D | sha1-armv4-large.S | 576 vsri.32 q8,q12,#31 623 vsri.32 q9,q12,#31 669 vsri.32 q10,q12,#31 715 vsri.32 q11,q12,#31
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/aosp_15_r20/external/rust/android-crates-io/crates/quiche/deps/boringssl/ios-arm/crypto/fipsmodule/ |
D | sha1-armv4-large.S | 579 vsri.32 q8,q12,#31 626 vsri.32 q9,q12,#31 672 vsri.32 q10,q12,#31 718 vsri.32 q11,q12,#31
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/aosp_15_r20/external/openscreen/third_party/boringssl/ios-arm/crypto/fipsmodule/ |
H A D | sha1-armv4-large.S | 579 vsri.32 q8,q12,#31 626 vsri.32 q9,q12,#31 672 vsri.32 q10,q12,#31 718 vsri.32 q11,q12,#31
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/aosp_15_r20/external/rust/crates/quiche/deps/boringssl/ios-arm/crypto/fipsmodule/ |
D | sha1-armv4-large.S | 579 vsri.32 q8,q12,#31 626 vsri.32 q9,q12,#31 672 vsri.32 q10,q12,#31 718 vsri.32 q11,q12,#31
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/aosp_15_r20/external/cronet/third_party/boringssl/src/gen/bcm/ |
H A D | sha1-armv4-large-linux.S | 551 vsri.32 q8,q12,#31 598 vsri.32 q9,q12,#31 644 vsri.32 q10,q12,#31 690 vsri.32 q11,q12,#31
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/aosp_15_r20/external/boringssl/src/gen/bcm/ |
H A D | sha1-armv4-large-linux.S | 551 vsri.32 q8,q12,#31 598 vsri.32 q9,q12,#31 644 vsri.32 q10,q12,#31 690 vsri.32 q11,q12,#31
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/aosp_15_r20/external/rust/crates/quiche/deps/boringssl/linux-arm/crypto/fipsmodule/ |
D | sha1-armv4-large.S | 576 vsri.32 q8,q12,#31 623 vsri.32 q9,q12,#31 669 vsri.32 q10,q12,#31 715 vsri.32 q11,q12,#31
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/aosp_15_r20/external/capstone/arch/ARM/ |
H A D | ARMMappingInsnOp.inc | 4585 { /* ARM_VSRIv16i8, ARM_INS_VSRI: vsri${p}.8 $vd, $vm, $simm */ 4588 { /* ARM_VSRIv1i64, ARM_INS_VSRI: vsri${p}.64 $vd, $vm, $simm */ 4591 { /* ARM_VSRIv2i32, ARM_INS_VSRI: vsri${p}.32 $vd, $vm, $simm */ 4594 { /* ARM_VSRIv2i64, ARM_INS_VSRI: vsri${p}.64 $vd, $vm, $simm */ 4597 { /* ARM_VSRIv4i16, ARM_INS_VSRI: vsri${p}.16 $vd, $vm, $simm */ 4600 { /* ARM_VSRIv4i32, ARM_INS_VSRI: vsri${p}.32 $vd, $vm, $simm */ 4603 { /* ARM_VSRIv8i16, ARM_INS_VSRI: vsri${p}.16 $vd, $vm, $simm */ 4606 { /* ARM_VSRIv8i8, ARM_INS_VSRI: vsri${p}.8 $vd, $vm, $simm */
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/aosp_15_r20/external/capstone/arch/AArch64/ |
H A D | ARMMappingInsnOp.inc | 4585 { /* ARM_VSRIv16i8, ARM_INS_VSRI: vsri${p}.8 $vd, $vm, $simm */ 4588 { /* ARM_VSRIv1i64, ARM_INS_VSRI: vsri${p}.64 $vd, $vm, $simm */ 4591 { /* ARM_VSRIv2i32, ARM_INS_VSRI: vsri${p}.32 $vd, $vm, $simm */ 4594 { /* ARM_VSRIv2i64, ARM_INS_VSRI: vsri${p}.64 $vd, $vm, $simm */ 4597 { /* ARM_VSRIv4i16, ARM_INS_VSRI: vsri${p}.16 $vd, $vm, $simm */ 4600 { /* ARM_VSRIv4i32, ARM_INS_VSRI: vsri${p}.32 $vd, $vm, $simm */ 4603 { /* ARM_VSRIv8i16, ARM_INS_VSRI: vsri${p}.16 $vd, $vm, $simm */ 4606 { /* ARM_VSRIv8i8, ARM_INS_VSRI: vsri${p}.8 $vd, $vm, $simm */
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/aosp_15_r20/external/vixl/src/aarch32/ |
H A D | assembler-aarch32.h | 5809 void vsri(Condition cond, 5814 void vsri(DataType dt, DRegister rd, DRegister rm, const DOperand& operand) { in vsri() function 5815 vsri(al, dt, rd, rm, operand); in vsri() 5818 void vsri(Condition cond, 5823 void vsri(DataType dt, QRegister rd, QRegister rm, const QOperand& operand) { in vsri() function 5824 vsri(al, dt, rd, rm, operand); in vsri()
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